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HY5DU561622FTP-5 参数 Datasheet PDF下载

HY5DU561622FTP-5图片预览
型号: HY5DU561622FTP-5
PDF下载: 下载PDF文件 查看货源
内容描述: 256M ( 16Mx16 ) DDR SDRAM [256M(16Mx16) DDR SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 28 页 / 180 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
 浏览型号HY5DU561622FTP-5的Datasheet PDF文件第16页浏览型号HY5DU561622FTP-5的Datasheet PDF文件第17页浏览型号HY5DU561622FTP-5的Datasheet PDF文件第18页浏览型号HY5DU561622FTP-5的Datasheet PDF文件第19页浏览型号HY5DU561622FTP-5的Datasheet PDF文件第21页浏览型号HY5DU561622FTP-5的Datasheet PDF文件第22页浏览型号HY5DU561622FTP-5的Datasheet PDF文件第23页浏览型号HY5DU561622FTP-5的Datasheet PDF文件第24页  
1HY5DU561622FTP-5  
HY5DU561622FTP-4  
EXTENDED MODE REGISTER SET (EMRS)  
The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional func-  
tions include DLL enable/disable, output driver strength selection(optional). These functions are controlled via the bits  
shown below. The Extended Mode Register is programmed via the Mode Register Set command ( BA0=1 and BA1=0)  
and will retain the stored information until it is programmed again or the device loses power.  
The Extended Mode Register must be loaded when all banks are idle and no bursts are in progress, and the controller  
must wait the specified time before initiating any subsequent operation. Violating either of these requirements will  
result in unspecified operation.  
BA1 BA0 A12 A11 A10  
A9  
A8  
A7  
A6  
DS  
A5  
A4  
A3  
A2  
A1  
DS  
A0  
0
1
RFU*  
RFU*  
DLL  
A0  
0
DLL enable  
Enable  
BA0  
0
MRS Type  
MRS  
1
Diable  
1
EMRS  
A6  
A1  
0
Output Driver Impedance Control  
0
0
1
1
Full  
Half  
1
0
RFU*  
RFU*  
1
* All bits in RFU address fields must be programmed to Zero, all other states are reserved for future usage.  
Rev. 1.1 / Mar. 2008  
20  
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