HY29F002T
AC CHARACTERISTICS
Alternate CE# Controlled Erase/Program Operations
Parameter
Speed Option
- 45 - 55 - 70 - 90
Description
Unit
JEDEC
tAVAV
Std
tWC Write Cycle Time (Note 1)
Min 45
Min
55
70
90
ns
ns
tAVWL
tWLAX
tDVWH
tWHDX
tGHEL
tWLEL
tEHWH
tELEH
tAS
Address Setup Time
0
tAH Address Hold Time
tDS Data Setup Time
Min 40
Min 25
Min
45
25
45
30
45
45
ns
ns
tDH Data Hold Time
0
0
0
0
ns
tGHEL Read Recovery Time Before Write
tWS WE# Setup Time
Min
ns
Min
ns
tWH WE# Hold Time
Min
ns
tCP CE# Pulse Width
Min 30
Min
30
35
45
ns
tEHEL
tCPH CE# Pulse Width High
20
7
ns
Typ
µs
tWHWH1 tWHWH1 Byte Programming Operation (Notes 1, 2, 3)
Chip Programming Operation (Notes 1, 2, 3, 5)
tWHWH2 tWHWH2 Sector Erase Operation (Notes 1, 2, 4)
tWHWH3 tWHWH3 Chip Erase Operation (Notes 1, 2, 4)
Erase and Program Cycle Endurance
Max
300
1.8
5.4
1
µs
Typ
sec
sec
sec
sec
sec
sec
cycles
cycles
Max
Typ
Max
8
Typ
7
Max
55
Typ
1,000,000
100,000
Min
Notes:
1. Not 100% tested.
2. Typical program and erase times assume the following conditions: 25 °C, VCC = 5.0 volts, 100,000 cycles. In addition,
programming typicals assume a checkerboard pattern. Maximum program and erase times are under worst case condi-
tions of 90 °C, VCC = 4.5 volts (4.75 volts for 55 ns version), 100,000 cycles.
3. Excludes system-level overhead, which is the time required to execute the four-bus-cycle sequence for the program
command. See Table 5 for further information on command sequences.
4. Excludes 0x00 programming prior to erasure. In the preprogramming step of the Automatic Erase algorithm, all bytes
are programmed to 0x00 before erasure.
5. The typical chip programming time is considerably less than the maximum chip programming time listed since most
bytes program faster than the maximum programming times specified. The device sets DQ[5] = 1 only If the maximum
byte program time specified is exceeded. See Write Operation Status section for additional information.
Rev. 4.1/May 01
33
HYNIX [ HYNIX SEMICONDUCTOR ]
