GMS81C5108 APPENDIX
16-BIT operation
Op
Code
Byte
No
Cycle
No
Flag
NVGBHIZC
No.
1
Mnemonic
Operation
16-Bits add without Carry
YA ← ( YA ) + ( dp +1 ) ( dp )
ADDW dp
1D
5D
BD
9D
7D
DD
3D
2
2
2
2
2
2
2
5
4
6
6
5
5
5
NV--H-ZC
N-----ZC
N-----Z-
N-----Z-
N-----Z-
--------
NV--H-ZC
Compare YA contents with memory pair contents :
2
CMPW dp
DECW dp
INCW dp
LDYA dp
STYA dp
SUBW dp
(YA) − (dp+1)(dp)
Decrement memory pair
( dp+1)( dp) ← ( dp+1) ( dp) - 1
3
Increment memory pair
( dp+1) ( dp) ← ( dp+1) ( dp ) + 1
4
Load YA
YA ← ( dp +1 ) ( dp )
5
Store YA
( dp +1 ) ( dp ) ← YA
6
16-Bits subtract without carry
YA ← ( YA ) - ( dp +1) ( dp)
7
Bit Manipulation
Op
Code
Byte
No
Cycle
No
Flag
NVGBHIZC
No.
Mnemonic
Operation
1
2
AND1 M.bit
AND1B M.bit
BIT dp
8B
8B
0C
1C
y1
3
3
2
3
2
2
1
1
1
3
3
3
3
3
3
3
2
2
1
1
3
4
4
4
5
4
2
2
2
2
5
5
4
4
5
5
5
4
2
2
2
6
Bit AND C-flag : C ← ( C ) ( M .bit )
Bit AND C-flag and NOT : C ← ( C ) ~( M .bit )
Bit test A with memory :
-------C
-------C
MM----Z-
3
Z ← ( A ) ( M ) , N ← ( M ) , V ← ( M )
4
BIT !abs
7
6
5
CLR1 dp.bit
CLRA1 A.bit
CLRC
Clear bit : ( M.bit ) ← “0”
Clear A bit : ( A.bit ) ← “0”
Clear C-flag : C ← “0”
Clear G-flag : G ← “0”
Clear V-flag : V ← “0”
--------
--------
-------0
--0-----
-0--0---
-------C
-------C
-------C
-------C
--------
-------C
-------C
--------
--------
-------1
--1-----
--------
6
2B
20
7
8
CLRG
40
9
CLRV
80
10
11
12
13
14
15
16
17
18
19
20
21
EOR1 M.bit
EOR1B M.bit
LDC M.bit
LDCB M.bit
NOT1 M.bit
OR1 M.bit
OR1B M.bit
SET1 dp.bit
SETA1 A.bit
SETC
AB
AB
CB
CB
4B
6B
6B
x1
Bit exclusive-OR C-flag : C ← ( C )
( M .bit )
Bit exclusive-OR C-flag and NOT : C ← ( C ) ~(M .bit)
Load C-flag : C ← ( M .bit )
Load C-flag with NOT : C ← ~( M .bit )
Bit complement : ( M .bit ) ← ~( M .bit )
Bit OR C-flag : C ← ( C ) ( M .bit )
Bit OR C-flag and NOT : C ← ( C ) ~( M .bit )
Set bit : ( M.bit ) ← “1”
0B
A0
C0
EB
Set A bit : ( A.bit ) ← “1”
Set C-flag : C ← “1”
SETG
Set G-flag : G ← “1”
STC M.bit
Store C-flag : ( M .bit ) ← C
Test and clear bits with A :
A - ( M ) , ( M ) ← ( M ) ~( A )
22
23
TCLR1 !abs
TSET1 !abs
5C
3C
3
3
6
6
N-----Z-
N-----Z-
Test and set bits with A :
A - ( M ) , ( M ) ← ( M ) ( A )
viii
JUNE 2001 Ver 1.0
HYNIX [ HYNIX SEMICONDUCTOR ]
