GMS81C5108 APPENDIX
B.3 Instruction Set
Arithmetic / Logic Operation
Op
Code
Byte
No
Cycle
No
Flag
NVGBHIZC
No.
Mnemonic
Operation
1
ADC #imm
04
05
06
07
15
16
17
14
84
85
86
87
95
96
97
94
08
09
19
18
44
45
46
47
55
56
57
54
5E
6C
7C
7E
8C
9C
2C
DF
CF
A8
A9
B9
B8
AF
BE
2
2
2
3
3
2
2
1
2
2
2
3
3
2
2
1
1
2
2
3
2
2
2
3
3
2
2
1
2
2
3
2
2
3
2
1
1
1
2
2
3
1
1
2
3
4
4
5
6
6
3
2
3
4
4
5
6
6
3
2
4
5
5
2
3
4
4
5
6
6
3
2
3
4
2
3
4
4
3
3
2
4
5
5
2
2
Add with carry.
2
ADC dp
A ← ( A ) + ( M ) + C
3
ADC dp + X
ADC !abs
ADC !abs + Y
ADC [ dp + X ]
ADC [ dp ] + Y
ADC { X }
AND #imm
AND dp
4
NV--H-ZC
5
6
7
8
9
Logical AND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
A ← ( A ) ( M )
AND dp + X
AND !abs
AND !abs + Y
AND [ dp + X ]
AND [ dp ] + Y
AND { X }
ASL A
N-----Z-
N-----ZC
Arithmetic shift left
ASL dp
7
6 5 4 3 2 1 0
C
←
← ← ← ← ← ← ← ← ← “0”
ASL dp + X
ASL !abs
CMP #imm
CMP dp
CMP dp + X
CMP !abs
CMP !abs + Y
CMP [ dp + X ]
CMP [ dp ] + Y
CMP { X }
CMPX #imm
CMPX dp
CMPX !abs
CMPY #imm
CMPY dp
CMPY !abs
COM dp
N-----ZC
Compare accumulator contents with memory contents
( A ) - ( M )
Compare X contents with memory contents
( X ) - ( M )
N-----ZC
N-----ZC
Compare Y contents with memory contents
( Y ) - ( M )
1’S Complement : ( dp ) ← ~( dp )
Decimal adjust for addition
Decimal adjust for subtraction
Decrement
N-----Z-
N-----ZC
N-----ZC
N-----Z-
N-----Z-
N-----Z-
N-----Z-
N-----Z-
N-----Z-
DAA
DAS
DEC A
DEC dp
M ← ( M ) - 1
DEC dp + X
DEC !abs
DEC X
DEC Y
JUNE 2001 Ver 1.0
v
HYNIX [ HYNIX SEMICONDUCTOR ]
