GMS81C5108 APPENDIX
Op
Code
Byte
No
Cycle
No
Flag
NVGBHIZC
No.
Mnemonic
Operation
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
DIV
9B
A4
A5
A6
A7
B5
B6
B7
B4
88
89
99
98
8F
9E
48
49
59
58
5B
64
65
66
67
75
76
77
74
28
29
39
38
68
69
79
78
24
25
26
27
35
36
37
34
4C
1
2
2
2
3
3
2
2
1
1
2
2
3
1
1
1
2
2
3
1
2
2
2
3
3
2
2
1
1
2
2
3
1
2
2
3
2
2
2
3
3
2
2
1
2
12
2
3
4
4
5
6
6
3
2
4
5
5
2
2
2
4
5
5
9
2
3
4
4
5
6
6
3
2
4
5
5
2
4
5
5
2
3
4
4
5
6
6
3
3
Divide : YA / X Q: A, R: Y
NV--H-Z-
EOR #imm
EOR dp
Exclusive OR
A ← ( A ) ( M )
EOR dp + X
EOR !abs
EOR !abs + Y
EOR [ dp + X ]
EOR [ dp ] + Y
EOR { X }
INC A
N-----Z-
Increment
N-----ZC
N-----Z-
N-----Z-
N-----Z-
N-----Z-
N-----Z-
INC dp
M ← ( M ) + 1
INC dp + X
INC !abs
INC X
INC Y
LSR A
Logical shift right
LSR dp
N-----ZC
N-----Z-
7
6 5 4 3 2 1 0
C
“0” → → → → → → → → →
→
LSR dp + X
LSR !abs
MUL
Multiply : YA ← Y × A
Logical OR
OR #imm
OR dp
A ← ( A ) ( M )
OR dp + X
OR !abs
N-----Z-
OR !abs + Y
OR [ dp + X ]
OR [ dp ] + Y
OR { X }
ROL A
Rotate left through Carry
ROL dp
N-----ZC
N-----ZC
7
6 5 4 3 2 1 0
C
← ← ← ← ← ← ← ←
ROL dp + X
ROL !abs
ROR A
Rotate right through Carry
6 5 4 3 2 1 0
→ → → → → → → →
ROR dp
7
C
ROR dp + X
ROR !abs
SBC #imm
SBC dp
Subtract with Carry
A ← ( A ) - ( M ) - ~( C )
SBC dp + X
SBC !abs
SBC !abs + Y
SBC [ dp + X ]
SBC [ dp ] + Y
SBC { X }
TST dp
NV--HZC
Test memory contents for negative or zero, ( dp ) - 00
Exchange nibbles within the accumulator
N-----Z-
N-----Z-
H
89
XCN
CE
1
5
A ~A ↔ A ~A
0
7
4
3
vi
JUNE 2001 Ver 1.0
HYNIX [ HYNIX SEMICONDUCTOR ]
