GMS81C5108
The operation within data memory (RAM)
ASL, BIT, DEC, INC, LSR, ROL, ROR
X indexed direct page, auto increment→ {X}+
In this mode, a address is specified within direct page by
the X register and the content of X is increased by 1.
Example; Addressing accesses the address 0135H regard-
less of G-flag and RPR.
LDA, STA
981501 INC
!0115H
;A ←ROM[115H]
Example; G=0, X=35H
DB
LDA
{X}+
data
115
H
➌
➋
~
~
~
35
~
H
data
➋
data+1 → data
data → A
36H → X
0F100
0F101
0F102
~
~
~
98
15
01
H
~
➊
➊
H
H
address: 0115
DB
(5) Indexed Addressing
X indexed direct page (8 bit offset) → dp+X
X indexed direct page (no offset) → {X}
In this mode, a address is specified by the X register.
ADC, AND, CMP, EOR, LDA, OR, SBC, STA, XMA
Example; X=15H, G=1, RPR=01H
This address value is the second byte (Operand) of com-
mand plus the data of ꢀ-register. And it assigns the mem-
ory in Direct page.
ADC, AND, CMP, EOR, LDA, LDY, OR, SBC, STA
STY, XMA, ASL, DEC, INC, LSR, ROL, ROR
D4
LDA
{X}
;ACC←RAM[X].
Example; G=0, X=0F5H
C645
LDA
45H+X
115
H
data
➋
data → A
~
~
~
~
3A
H
data
➊
➌
D4
0E550
H
data → A
~
~
~
➋
~
0E550
0E551
C6
45
➊
H
H
45 +0F5 =13A
H
H
H
28
JUNE 2001 Ver 1.0
HYNIX [ HYNIX SEMICONDUCTOR ]
