GMS81C5108
8.3 Data Memory
Figure 8-8 shows the internal Data Memory space availa-
ble. Data Memory is divided into four groups, a user RAM,
control registers, Stack, and LCD memory.
Control Registers
The control registers are used by the CPU and Peripheral
function blocks for controlling the desired operation of the
device. Therefore these registers contain control and status
bits for the interrupt system, the timer/ counters, analog to
digital converters and I/O ports. The control registers are in
address range of 0C0H to 0FFH.
Note that unoccupied addresses may not be implemented
on the chip. Read accesses to these addresses will in gen-
eral return random data, and write accesses will have an in-
determinate effect.
0000
H
USER MEMORY
(Including STACK Area)
(192 Bytes)
More detailed informations of each register are explained
in each peripheral section.
PAGE0
PAGE1
00BF
00C0
H
H
Note: Write only registers can not be accessed by bit ma-
nipulation instruction. Do not use read-modify-write instruc-
tion. Use byte manipulation instruction.
PERIPHERAL CONTROL
REGISTERS
00FF
0100
H
H
LCD DISPLAY
MEMORY
0124
H
Example; To write at CKCTLR
LDM
CKCTLR,#05H;Divide ratio ÷8
Figure 8-8 Data Memory Map
User Memory
Stack Area
The stack provides the area where the return address is
saved before a jump is performed during the processing
routine at the execution of a subroutine call instruction or
the acceptance of an interrupt.
The GMS81C5108 has 192 × 8 bits for the user memory
(RAM).
There are two page internal RAM. Page is selected by G-
flag and RAM page selection register RPR. When G-flag
is cleared to “0”, always page 0 is selected regardless of
RPR value. If G-flag is set to “1”, page will be selected ac-
cording to RPR value.
When returning from the processing routine, executing the
subroutine return instruction [RET] restores the contents of
the program counter from the stack; executing the interrupt
return instruction [RETI] restores the contents of the pro-
gram counter and flags.
The save/restore locations in the stack are determined by
the stack pointed (SP). The SP is automatically decreased
after the saving, and increased before the restoring. This
means the value of the SP indicates the stack location
number for the next save. Refer to Figure 8-4 on page 20.
Page 0
RPR=0, G=0
Page 1
RPR=1, G=1
Page 0: 00~FF
H
Page 1: 100~124
H
LCD Display Memory
LCD display data area is handled in LCD section.
See "19.3 LCD Display Memory" on page 73.
Figure 8-9 RAM page configuration
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JUNE 2001 Ver 1.0
HYNIX [ HYNIX SEMICONDUCTOR ]
