GMS81C5108
7.7 Serial I/O Characteristics
(TA=25°C, VDD=AVDD=2~4V, VSS=AVSS=0V)
Specifications
Parameter
Symbol
Pins
Unit
Min.
2tSYS+200
tSYS+70
4tSYS
Typ.
Max.
tSCYC
tSCKW
tSCYC
tSCKW
tDS
SCK Input Clock Pulse Period
SCK Input Clock “H” or “L” Pulse Width
SCK Output Clock Cycle Time
SCK output Clock “H” or “L” Pulse Width
SCK output Clock Delay Time
SI input Setup Time (External SCK)
SI input Setup Time (Internal SCK)
SI input Hold Time
-
-
-
-
-
-
-
-
-
-
16tSYS
SCK
2tSYS-30
-
-
nS
100
tESUS
tISUS
tHS
100
-
-
-
SI
100
tSYS+100
t
SCYC
t
t
SCKW
SCKW
0.8V
DD
SCK
0.2V
DD
t
t
HS
SUS
0.8V
0.2V
DD
SI
DD
t
DS
0.8V
0.2V
DD
SO
DD
Figure 7-2 Serial I/O Timing Chart
JUNE 2001 Ver 1.0
15
HYNIX [ HYNIX SEMICONDUCTOR ]
