Electrical Specifications, Digital Interface IC
Unless otherwise noted, all Typical specifications are at T = 25°C and V = 5 V, and all Minimum and
A
DD
Maximum specifications apply over the following ranges: T = -40°C to +85°C and V = 4.5 to 5.5 V.
A
DD
Parameter
Supply Current
DC Input Current
Input Logic Low Voltage
Input Logic High Voltage
Output Logic Low Voltage
Output Logic High Voltage
Clock Frequency (CCLK,
MCLK and SCLK)
Symbol
Min. Typ. Max. Units Test Conditions Fig. Note
I
20
0.001
35
10
0.8
mA
µA
V
f
= 10 MHz
DD
CLK
I
IN
V
IL
V
2.0
4.3
V
V
V
MHz
IH
V
0.15
5.0
0.4
20
I
I
= 4 mA
= -400 µA
OL
OUT
V
OH
OUT
f
CLK
Clock Period (CCLK,
MCLK and SCLK)
Clock High Level Pulse
Width (CCLK, MCLK
and SCLK)
t
50
20
ns
ns
18,
19
PER
t
PWH
Clock Low Level Pulse
Width (CCLK, MCLK
and SCLK)
Setup Time from DAT to
Rising Edge of CLK
(CDAT, CCLK, MDAT
and MCLK)
t
20
10
PWL
t
18
SUCLK
DAT Hold Time after
Rising Edge of CLK
(CDAT, CCLK, MDAT
and MCLK)
t
10
HDCLK
Setup Time from Falling
Edge of CLAT to First
Rising Edge of CCLK
Setup Time from Last
Rising Edge of CCLK
to Rising Edge of CLAT
Delay Time from Falling
Edge of SCLK to SDAT
Setup Time from Data
Ready to First Falling
Edge of SCLK
t
20
20
SUCL1
SUCL2
DSDAT
t
t
t
15
19
t
200
SUS
Setup Time from CHAN
to falling edge of CS
20
SUCHS
Reset High Level Pulse
Width
t
100
PWR
1-276
HP [ HEWLETT-PACKARD ]
