HI-3110
PIN DESCRIPTIONS
SIGNAL FUNCTION
DESCRIPTION
INTERNAL PULL UP / DOWN
50K ohm pull-down
50K ohm pull-up
SCK
CS
INPUT
INPUT
SPI Clock. Data is shifted into or out of the SPI interface using SCK
Chip Select. Data is shifted into SI and out of SO when CS is low.
SPI interface serial data input
SI
INPUT
50K ohm pull-down
SO
OUTPUT
OUTPUT
OUTPUT
INPUT
SPI interface serial data output
INT
Active high. Programmable interrupt output
Active high. Programmable status output.
STAT
TXEN
Active high. Transmit Enable pin. When the TXEN pin is asserted, any message 100K ohm pull-down
in the Transmit FIFO will be automatically loaded to the Transmit buffer and sent
if the bus is available. This pin is logically ORed with the TXEN and TX1M bits
in the CTRL1 register. When the TXEN pin is reset, messages loaded to the
FIFO will not be sent until TXEN or TX1M bits are set in the CTRL1 register.
Crystal input. A parallel resonant crystal can be connected between OSCIN and
OSCOUT. If an external clock is used, it should be connected to the OSCIN pin
and the OSCOUT pin should be left floating. The internal oscillator should be
shut off by setting the OSCOFF bit in the CTRL1 register.
Crystal output. If an external clock is used, this pin should be left floating and
disabled by setting the OSCOFF bit in the CTRL1 register.
General purpose pin 1, which can be programmed to reflect the values of
interrupt and status flag bits.
OSCIN
INPUT
OSCOUT
GP1
OUTPUT
OUTPUT
OUTPUT
GP2
General purpose pin 2, which can be programmed to reflect the values of
interrupt and status flag bits.
CLKOUT
SPLIT
OUTPUT
OUTPUT
Clock output pin with programmable frequency divider.
VDD/2 output bias (Powered off in Sleep Mode and when the common mode
bias is greater than 25V).
CANH
CANL
MR
BUS I/O
BUS I/O
INPUT
CAN bus line high.
CAN bus line low.
Active High. Device Master Reset input pin. Asserting this pin resets all registers 50K ohm pull-down
and memory buffers to their default state at start-up.
VDD
POWER
POWER
5V supply voltage input.
VLOGIC
3.3V supply voltage input. This supply is used to drive the host digital logic I/O.
It can either be connected directly to VDD (+5V) or a +3.3V supply.
Supply voltage ground.
GND
POWER
HOLT INTEGRATED CIRCUITS
3
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
