HT48R063/064/065/066/0662/067
External Interrupt
The external interrupt pin is pin-shared with the I/O pin
PA3 and can only be configured as an external interrupt
pin if the corresponding external interrupt enable bit in
the INTC0 register has been set and the edge trigger
type has been selected using the CTRL1 register. The
pin must also be setup as an input by setting the corre-
sponding PAC.3 bit in the port control register. When the
interrupt is enabled, the stack is not full and a transition
appears on the external interrupt pin, a subroutine call to
the external interrupt vector at location 04H, will take
place. When the interrupt is serviced, the external inter-
rupt request flag, INTF, will be automatically reset and
the EMI bit will be automatically cleared to disable other
interrupts. Note that any pull-high resistor connections
on this pin will remain valid even if the pin is used as an
external interrupt input.
For an external interrupt to occur, the global interrupt en-
able bit, EMI, and external interrupt enable bit, INTE,
must first be set. An actual external interrupt will take
place when the external interrupt request flag, INTF, is
set, a situation that will occur when an edge transition
appears on the external INT line. The type of transition
that will trigger an external interrupt, whether high to low,
low to high or both is determined by the INTEG0 and
INTEG1 bits, which are bits 6 and 7 respectively, in the
CTRL1 control register. These two bits can also disable
the external interrupt function.
INTEG1
INTEG0
Edge Trigger Type
External interrupt disable
Rising edge Trigger
Falling edge Trigger
Both edge Trigger
0
0
1
1
0
1
0
1
·
HT48R063/HT48R064/HT48R065
¨
INTC0 Register
Bit
Name
R/W
7
6
5
4
3
2
1
INTE
R/W
0
0
TBF
R/W
0
T0F
R/W
0
INTF
R/W
0
TBE
R/W
0
T0E
R/W
0
EMI
R/W
0
¾
¾
¾
POR
Bit 7
Bit 6
unimplemented, read as ²0²
TBF: Timer Base event interrupt request flag
0: inactive
1: active
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
T0F: Timer/Event Counter 0 interrupt request flag
0: inactive
1: active
INTF: External interrupt request flag
0: inactive
1: active
TBE: Time base event interrupt enable
0: disable
1: enable
T0E: Timer/Event Counter 0 interrupt enable
0: disable
1: enable
INTE: external interrupt enable
0: disable
1: enable
EMI: Master interrupt global enable
0: disable
1: enable
Rev. 1.10
54
June 9, 2009
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
