HT48R063 参数 Datasheet PDF下载

型号：	HT48R063
PDF下载：	下载PDF文件查看货源
内容描述：	增强I / O型8位OTP MCU [Enhanced I/O Type 8-Bit OTP MCU]
分类和应用：
文件页数/大小：	93 页 / 511 K
品牌：	HOLTEK [ HOLTEK SEMICONDUCTOR INC ]

HT48R063/064/065/066/0662/067

The different kinds of resets all affect the internal registers of the microcontroller in different ways. To ensure reliable

continuation of normal program execution after a reset occurs, it is important to know what condition the microcontroller

is in after a particular reset occurs. The following table describes how each type of reset affects each of the

microcontroller internal registers.

Power-on

Reset

RES or LVR

Reset

WDT Time-out

(Idle/Sleep)

(Normal Operation)

PCL

MP0

MP1

MP0

MP1

0 0 0 0 0 0 0 0

1 x x x x x x x

x x x x x x x x

- - - - - - - 0

x x x x x x x x

- - x x x x x x

- x x x x x x x

x x x x x x x x

- - - - - 1 1 1

- - 0 0 x x x x

- 0 0 0 0 0 0 0

- - - 0 - - - 0

- - 0 - - - 0 -

- 0 - 0 - 0 - 0

x x x x x x x x

0 0 0 0 1 0 0 0

x x x x x x x x

0 0 0 0 1 - - -

x x x x x x x x

0 0 - 0 1 0 0 0

1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0

- 0 0 0 0 0 0 0

- - 1 1 1 1 1 1

- - 0 0 0 0 0 0

0 0 0 0 0 0 0 0

1 u u u u u u u

u u u u u u u u

- - - - - - - 0

u u u u u u u u

- - u u u u u u

- u u u u u u u

u u u u u u u u

- - - - - 1 1 1

- - u u u u u u

- 0 0 0 0 0 0 0

- - - 0 - - - 0

- - 0 - - - 0 -

- 0 - 0 - 0 - 0

x x x x x x x x

0 0 0 0 1 0 0 0

x x x x x x x x

0 0 0 0 1 - - -

x x x x x x x x

0 0 - 0 1 0 0 0

1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0

- 0 0 0 0 0 0 0

- - 1 1 1 1 1 1

- 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

1 u u u u u u u

u u u u u u u u

- - - - - - - 0

u u u u u u u u

- - u u u u u u

- u u u u u u u

u u u u u u u u

- - - - - 1 1 1

- - 1 u u u u u

- 0 0 0 0 0 0 0

- - - 0 - - - 0

- - 0 - - - 0 -

- 0 - 0 - 0 - 0

x x x x x x x x

0 0 0 0 1 0 0 0

x x x x x x x x

0 0 0 0 1 - - -

x x x x x x x x

0 0 - 0 1 0 0 0

1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0

- 0 0 0 0 0 0 0

- - 1 1 1 1 1 1

- 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

1 u u u u u u u

u u u u u u u u

- - - - - - - u

u u u u u u u u

- - u u u u u u

- u u u u u u u

u u u u u u u u

- - - - - u u u

- - 1 1 u u u u

- u u u u u u u

- - - u - - - u

- - u - - - u -

- u - u - u - u

u u u u u u u u

u u u u u - - -

u u - u u u u u

u u u u u u u u

- u u u u u u u

- - u u u u u u

ACC

TBLP

TBLH

WDTS

STATUS

INTC0

INTC1

TMR0

TMR0C

TMR1

TMR1C

TMR2

TMR2C

PAC

PAWK

PAPU

PBC

PBPU

Rev. 1.10

June 9, 2009

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