HT48R50A-1/HT48C50-1
Timer/Event Counter
(can always be optioned) or fRTC (enable only the sys-
tem oscillator in the Int. RC+RTC mode) by options.
Using external clock input allows the user to count exter-
nal events, measure time internals or pulse widths, or
generate an accurate time base. While using the inter-
nal clock allows the user to generate an accurate time
base.
Two timer/event counters (TMR0, TMR1) are imple-
mented in the microcontroller. The Timer/Event Counter
0 contains an 8-bit programmable count-up counter and
the clock may come from an external source or from the
system clock or RTC.
The Timer/Event Counter 1 contains an 16-bit program-
mable count-up counter and the clock may come from
an external source or from the system clock divided by 4
or RTC.
The Timer/Event Counter 0 can generate PFD signal by
using external or internal clock and PFD frequency is
determine by the equation fINT/[2´(256-N)].
Using the internal clock sources, there are 2 reference
time-bases for Timer/Event Counter 0. The internal
clock source can be selected as coming from fSYS (can
always be optioned) or fRTC (enabled only system oscil-
lator in the Int. RC+RTC mode) by options.
There are 2 registers related to the Timer/Event Counter
0; TMR0 ([0DH]), TMR0C ([0EH]). Two physical registers
are mapped to TMR0 location; writing TMR0 makes the
starting value be placed in the Timer/Event Counter 0
preload register and reading TMR0 gets the contents of
the Timer/Event Counter 0. The TMR0C is a timer/event
countercontrolregister,whichdefinessomeoptions.
Using the internal clock sources, there are 2 reference
time-bases for Timer/Event Counter 1. The internal
clock source can be selected as coming from fSYS/4
Bit No.
Label
Function
To define the prescaler stages, T0PSC2, T0PSC1, T0PSC0=
000: fINT=fSYS/2 or fRTC/2
001: fINT=fSYS/4 or fRTC/4
0
1
2
T0PSC0 010: fINT=fSYS/8 or fRTC/8
T0PSC1 011: fINT=fSYS/16 or fRTC/16
T0PSC2 100: fINT=fSYS/32 or fRTC/32
101: fINT=fSYS/64 or fRTC/64
110: fINT=fSYS/128 or fRTC/128
111: fINT=fSYS/256 or fRTC/256
To define the TMR0 active edge of Timer/Event Counter 0
3
T0E
(0=active on low to high; 1=active on high to low)
To enable or disable timer 0 counting (0=disabled; 1=enabled)
Unused bit, read as ²0²
4
5
T0ON
¾
To define the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
6
7
T0M0
T0M1
TMR0C (0EH) Register
Bit No.
Label
Function
0~2, 5
¾
Unused bit, read as ²0²
To define the TMR1 active edge of Timer/Event Counter 1
(0=active on low to high; 1=active on high to low)
3
4
T1E
T1ON
To enable or disable timer 1 counting (0=disabled; 1=enabled)
To define the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
6
7
T1M0
T1M1
TMR1C (11H) Register
Rev. 2.01
14
January 9, 2009
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
