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HT48R0AA-1 参数 Datasheet PDF下载

HT48R0AA-1图片预览
型号: HT48R0AA-1
PDF下载: 下载PDF文件 查看货源
内容描述: 高性价比的I / O型8位OTP MCU [Cost-Effective I/O Type 8-Bit OTP MCU]
分类和应用:
文件页数/大小: 40 页 / 258 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT48R0AA-1  
Pin Description  
Configuration  
Options  
Pin Name I/O  
Description  
Bidirectional 8-bit I/O port. Each bit can be configured as a wake-up input by  
configuration option. Software instructions determined the CMOS output or  
Schmitt trigger input with a pull-high resistor (determined by a pull-high configu-  
ration option).  
Pull-high  
Wake-up  
PA0~PA7  
I/O  
I/O  
Bidirectional 8-bit I/O port. Software instructions determined the CMOS output or  
Schmitt trigger input with a pull-high resistor (determined by a pull-high configu-  
ration option). The PB0 and PB1 are pin-shared with the BZ and BZ, respec-  
PB0/BZ  
PB1/BZ  
PB2~PB7  
Pull-high  
I/O or BZ/BZ tively. Once the PB0 and PB1 are selected as buzzer driving outputs, the output  
signals come from an internal PFD generator (shared with an 8 bits timer/event  
counter).  
Bidirectional 6-bit I/O lines. Software instructions determine the CMOS output  
or Schmitt trigger input with a pull-high resistor (determined by a pull-high con-  
PC0/TMR0  
PC1~PC4 I/O  
PC5/TMR1  
Pull-high  
Pull-high  
figuration option). The Timer/Event Counter 0 and the Timer/Event Counter 1  
counter input (Schmitt trigger input without pull-high resistor) are pin-shared  
with the PC0 and PC5, respectively.  
Bi-directional I/O line. Software instructions determine the CMOS output or  
Schmitt trigger input with a pull-high resistor (determined by a pull-high configu-  
ration option). the external interrupt input INT, is pin-shared with PD0 and is ac-  
tivated on a high to low transition.  
PD0/INT  
I/O  
VDD  
VSS  
RES  
Positive power supply  
¾
¾
I
¾
¾
¾
Negative power supply, ground  
Schmitt trigger reset input. Active low.  
OSC1, OSC2 are connected to an RC network or Crystal (determined by con-  
figuration options) for the internal system clock. In the case of RC operation,  
OSC2 is the output terminal for 1/4 system clock.  
OSC1  
OSC2  
I
Crystal  
or RC  
O
Note: The pull-high resistors of each I/O port (PA, PB, PC, PD) are controlled by configuration options.  
Each pin on PA can be programmed through a configuration option to have a wake-up function.  
Pins PC1~PC4 exist but are not bonded out on the 24-pin package.  
Unbonded pins should be setup as outputs or as inputs with pull-high resistors to conserve power.  
Absolute Maximum Ratings  
Supply Voltage...........................VSS-0.3V to VSS+6.0V  
Input Voltage..............................VSS-0.3V to VDD+0.3V  
Storage Temperature............................-50°C to 125°C  
Operating Temperature...........................-40°C to 85°C  
IOH Total............................................................-100mA  
I
OL Total ..............................................................150mA  
Total Power Dissipation .....................................500mW  
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may  
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed  
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.  
Rev. 1.10  
3
July 27, 2007