HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
Interrupt Operation
A Timer/Event Counter overflow, an active edge on the external interrupt pin, a serial data byte
transmitted or received completion, or a Time Base event will all generate an interrupt request by
setting their corresponding request flag, if their appropriate interrupt enable bit is set. When this
happens, the Program Counter, which stores the address of the next instruction to be executed, will be
transferred onto the stack. The Program Counter will then be loaded with a new address which will be
the value of the corresponding interrupt vector. The microcontroller will then fetch its next instruction
from this interrupt vector. The instruction at this vector will usually be a JMP statement which will
jump to another section of program which is known as the interrupt service routine. Here is located
the code to control the appropriate interrupt. The interrupt service routine must be terminated with a
RETI instruction, which retrieves the original Program Counter address from the stack and allows the
microcontroller to continue with normal execution at the point where the interrupt occurred.
The various interrupt enable bits, together with their associated request flags, are shown in the
following diagram with their order of priority.
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Once an interrupt subroutine is serviced, all the other interrupts will be blocked, as the EMI bit will
be cleared automatically. This will prevent any further interrupt nesting from occurring. However,
if other interrupt requests occur during this interval, although the interrupt will not be immediately
serviced, the request flag will still be recorded. If an interrupt requires immediate servicing
while the program is already in another interrupt service routine, the EMI bit should be set after
entering the routine, to allow interrupt nesting. If the stack is full, the interrupt request will not be
acknowledged, even if the related interrupt is enabled, until the Stack Pointer is decremented. If
immediate service is desired, the stack must be prevented from becoming full.
Rev. 1.00
74
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