HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
Pin Name
Function
PCꢄ
ANꢄ
PC7
AN7
PD0
TCꢃ
PD1
PWM3
PDꢃ
PD3
PCLK
PD4
SCS
PD5
SCK
SCL
PDꢄ
SDI
SDA
PD7
SDO
PE0
AN8
PE1
AN9
PEꢃ
AN10
PE3
AN11
PE4
AN1ꢃ
PE5
AN13
PEꢄ
AN14
PE7
AN15
PF0
SDOA
PF1
SDIA
PFn
PGn
PHn
VDD
VSS
OPT
PCPU
ANCSR0 AN
PCPU
I/T
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
A/D channel ꢄ
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp.
ANCSR0 AN A/D channel 7
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ST Exteꢁnal Timeꢁ ꢃ clock inpꢀt
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
CMOS PWM oꢀtpꢀt
O/T
Descriptions
PCꢄ/ANꢄ
—
PC7/AN7
PD0/TCꢃ
—
PDPU
—
—
PDPU
CTRLꢃ
PDPU
PDPU
—
PDPU
—
PDPU
—
—
PDPU
—
—
PDPU
—
PD1/PWM3
PDꢃ
—
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
PD3/PCLK
—
CMOS Peꢁipheꢁal Clock oꢀtpꢀt
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ST CMOS SPI Slave Select
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ST CMOS SPI Seꢁial Clock
ST NMOS IꢃC Clock
PD4/SCS
PD5/SCK/SCL
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
PDꢄ/SDI/SDA
ST
—
SPI Data inpꢀt
ST NMOS IꢃC Data
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
—
PD7/SDO
PE0/AN8
CMOS SPI Data oꢀtpꢀt
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
A/D channel 8
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ANCSR1 AN A/D channel 9
PEPU ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ANCSR1 AN A/D channel 10
PEPU ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ANCSR1 AN A/D channel 11
PEPU ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ANCSR1 AN A/D channel 1ꢃ
PEPU ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ANCSR1 AN A/D channel 13
PEPU ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ANCSR1 AN A/D channel 14
PEPU ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ANCSR1 AN A/D channel 15
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
CMOS SPI Data oꢀtpꢀt
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ST SPI Data inpꢀt
PEPU
ANCSR1 AN
PEPU
—
PE1/AN9
—
PEꢃ/AN10
PE3/AN11
PE4/AN1ꢃ
PE5/AN13
PEꢄ/AN14
PE7/AN15
PF0/SDOA
PF1/SDIA
—
—
—
—
—
—
PFPU
—
PFPU
—
PFPU
PGPU
PHPU
—
—
—
PFꢃ~PF7
PG0~PG7
PH0~PH5
VDD
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
ST CMOS Geneꢁal pꢀꢁpose I/O. Registeꢁ enabled pꢀll-ꢀp .
PWR
PWR
—
—
Poweꢁ sꢀpplꢂ
Gꢁoꢀnd
VSS
—
Note: I/T: Input type; O/T: Output type
OPT: Optional by configuration option (CO) or register option
PWR: Power; CO: Configuration option
ST: Schmitt Trigger input; CMOS: CMOS output;
AN: Analog input or output
SCOM: Software controlled LCD COM
HXT: High frequency crystal oscillator
LXT: Low frequency crystal oscillator
Rev. 1.00
ꢄ
�anꢀaꢁꢂ ꢃꢄꢅ ꢃ011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
