HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
SPIA Configuration Options
Several configuration options exist for the SPIA Interface function which must be setup during
device programming. One option is to enable the operation of the WCOL, write collision bit, in the
SBCR register. Another option exists to select the clock polarity of the SCKA line. A configuration
option also exists to disable or enable the operation of the CSEN bit in the SBCR register. If the
configuration option disables the CSEN bit then this bit cannot be used to affect overall control of
the SPIA Interface.
Error Detection
The WCOL bit in the SBCR register is provided to indicate errors during data transfer. The bit is
set by the Serial Interface but must be cleared by the application program. This bit indicates a data
collision has occurred which happens if a write to the SBDR register takes place during a data
transfer operation and will prevent the write operation from continuing. The bit will be set high by
the Serial Interface but has to be cleared by the user application program. The overall function of
the WCOL bit can be disabled or enabled by a configuration option.
Programming Considerations
When the device is placed into the Idle Mode note that data reception and transmission will
continue. The TRF bit is used to generate an interrupt when data has been transferred or received.
Digital to Analog Converter – DAC
The devices include a 12-bit Digital to Analog Converter function. This function allows digital
data contained in the device to generate audio signals.
Operation
The data to be converted is stored in two registers DAL and DAH. The DAH register stores the
highest 8-bits, DA4~DA11, while DAL stores the lowest 4-bits, DA0~DA3. An bit in the control
register, CTRL2, provides overall DAC on/off control and a volume control register, VOL,
provides a 3-bit 8-level volume control. The DAC output is channeled to pin AUD which is pin-
shared with I/O pin PA4. When the DAC is enabled by setting the DACEN pin high, then the
original I/O function will be disabled, along with any pull-high resistor options. The DAC output
reference voltage is the power supply voltage VDD
.
● DAH Register
Bit
Name
R/W
7
DA11
R/W
0
6
DA10
R/W
0
5
4
3
2
1
0
DA9
R/W
0
DA8
R/W
0
DA7
R/W
0
DAꢄ
R/W
0
DA5
R/W
0
DA4
R/W
0
POR
Bits 7~0
DA11~DA0 Audio Output DAC high byte bits
● DAL Register
Bit
7
6
5
4
3
—
—
0
2
—
—
0
1
—
—
0
0
—
—
0
Name
R/W
POR
DA3
R/W
0
DAꢃ
R/W
0
DA1
R/W
0
DA0
R/W
0
Bits 7~4
Bits 3~0
DA3~DA0 Audio Output DAC low bits
Unimplemented – read as “0”
Rev. 1.00
10ꢃ
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HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
