HT46R51/HT46R52
Test Conditions
Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
3V
1
2
¾
¾
¾
¾
mA
mA
Standby Current
ISTB2
No load, system HALT
(WDT & AD Disabled)
5V
Input Low Voltage for I/O Ports,
TMR and INT
VIL1
0.3VDD
VDD
0
V
V
¾
¾
¾
¾
¾
¾
Input High Voltage for I/O Ports,
TMR and INT
VIH1
0.7VDD
VIL2
0.4VDD
VDD
3.3
¾
Input Low Voltage (RES)
Input High Voltage (RES)
Low Voltage Reset Voltage
0
0.9VDD
2.7
4
V
V
¾
¾
¾
¾
¾
3
VIH2
VLVR
¾
Configuration option: 3V
V
¾
3V
5V
3V
5V
3V
5V
¾
8
mA
mA
mA
mA
kW
kW
V
IOL
V
OL=0.1VDD
OH=0.9VDD
I/O Port Sink Current
10
20
-4
-10
60
30
¾
¾
-2
¾
IOH
V
I/O Port Source Current
-5
¾
20
100
50
RPH
Pull-high Resistance of I/O Ports
A/D Input Voltage
¾
10
VAD
VREF
0
¾
¾
ADC Input Reference Voltage
Range
VREF
1.2
VDD
V
¾
¾
DNL
INL
ADC Differential Non-Linear
ADC Integral Non-Linear
LSB
LSB
Bits
mA
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
¾
±2.5
¾
±2
±4
12
1
RESOLU Resolution
¾
3V
5V
0.5
1.5
Additional Power Consumption
if A/D Converter is Used
IADC
¾
3
mA
A.C. Characteristics
Ta=25°C
Test Conditions
Conditions
2.2V~5.5V
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
¾
¾
¾
¾
3V
5V
¾
¾
¾
¾
¾
¾
400
400
0
4000
8000
4000
8000
180
130
¾
kHz
kHz
kHz
kHz
¾
¾
fSYS
System Clock (Crystal OSC)
Timer I/P Frequency (TMR)
Watchdog Oscillator Period
3.3V~5.5V
2.2V~5.5V
¾
fTIMER
3.3V~5.5V
0
¾
45
32
1
90
65
¾
¾
ms
ms
tWDTOSC
¾
tRES
tSST
tINT
External Reset Low Pulse Width
System Start-up Timer Period
Interrupt Pulse Width
¾
ms
tSYS
Wake-up from HALT
1024
¾
¾
1
¾
¾
¾
¾
¾
¾
ms
ms
tAD
A/D Clock Period
1
¾
¾
tADC
tADCS
tAD
tAD
A/D Conversion Time
A/D Sampling Time
80
32
¾
¾
¾
¾
Note: tSYS=1/fSYS
Rev. 1.40
4
July 12, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
