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HT46R47E 参数 Datasheet PDF下载

HT46R47E图片预览
型号: HT46R47E
PDF下载: 下载PDF文件 查看货源
内容描述: 高性价比的A / D型8位MCU [Cost-Effective A/D Type 8-Bit MCU]
分类和应用:
文件页数/大小: 45 页 / 335 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46R47E/HT46C47E  
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Location 00CH  
Program Memory - ROM  
This area is reserved for the A/D converter interrupt  
service program. If an A/D converter interrupt results  
from an end of A/D conversion, and if the interrupt is  
enabled and the stack is not full, the program begins  
execution at location 00CH.  
The program memory is used to store the program in-  
structions which are to be executed. It also contains  
data, table, and interrupt entries, and is organized into  
2048´14 bits, addressed by the program counter and ta-  
ble pointer.  
Table location  
Certain locations in the program memory are reserved  
for special usage:  
Any location in the ROM space can be used as  
look-up tables. The instructions ²TABRDC [m]² (the  
current page, 1 page=256 words) and ²TABRDL [m]²  
(the last page) transfer the contents of the lower-order  
byte to the specified data memory, and the  
higher-order byte to TBLH (08H). Only the destination  
of the lower-order byte in the table is well-defined, the  
other bits of the table word are transferred to the lower  
portion of TBLH, and the remaining 2 bits are read as  
²0². The Table Higher-order byte register (TBLH) is  
read only. The table pointer (TBLP) is a read/write reg-  
ister (07H), which indicates the table location. Before  
accessing the table, the location must be placed in  
TBLP. The TBLH is read only and cannot be restored.  
If the main routine and the ISR (Interrupt Service Rou-  
tine) both employ the table read instruction, the con-  
tents of the TBLH in the main routine are likely to be  
changed by the table read instruction used in the ISR.  
Errors can occur. In other words, using the table read  
instruction in the main routine and the ISR simulta-  
neously should be avoided. However, if the table read  
instruction has to be applied in both the main routine  
and the ISR, the interrupt is supposed to be disabled  
prior to the table read instruction. It will not be enabled  
until the TBLH has been backed up. All table related  
instructions require two cycles to complete the opera-  
tion. These areas may function as normal program  
memory depending upon the requirements.  
·
Location 000H  
This area is reserved for program initialization. After  
chip reset, the program always begins execution at lo-  
cation 000H.  
·
Location 004H  
This area is reserved for the external interrupt service  
program. If the INT input pin is activated, the interrupt  
is enabled and the stack is not full, the program begins  
execution at location 004H.  
·
Location 008H  
This area is reserved for the timer/event counter inter-  
rupt service program. If a timer interrupt results from a  
timer/event counter overflow, and if the interrupt is en-  
abled and the stack is not full, the program begins exe-  
cution at location 008H.  
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Stack Register - STACK  
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This is a special part of the memory which is used to  
save the contents of the program counter only. The  
stack is organized into 6 levels and is neither part of the  
data nor part of the program space, and is neither read-  
able nor writeable. The activated level is indexed by the  
stack pointer (SP) and is neither readable nor writeable.  
At a subroutine call or interrupt acknowledgment, the  
contents of the program counter are pushed onto the  
stack. At the end of a subroutine or an interrupt routine,  
signaled by a return instruction (RET or RETI), the pro-  
gram counter is restored to its previous value from the  
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7
Program Memory  
Table Location  
Instruction  
*10  
P10  
1
*9  
P9  
1
*8  
P8  
1
*7  
*6  
*5  
*4  
*3  
*2  
*1  
*0  
TABRDC [m]  
TABRDL [m]  
@7  
@7  
@6  
@6  
@5  
@5  
@4  
@4  
@3  
@3  
@2  
@2  
@1  
@1  
@0  
@0  
Table Location  
P10~P8: Current program counter bits  
Note: *10~*0: Table location bits  
@7~@0: Table pointer bits  
Rev. 1.30  
8
July 13, 2005  
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