HT46R01/HT46R02/HT46R03
Pulse Width Modulator
Each microcontroller is provided with a single Pulse
Width Modulation, PWM, output. Useful for such appli-
cations such as motor speed control, the PWM function
provides outputs with a fixed frequency but with a duty
cycle that can be varied by setting particular values into
the corresponding PWM register.
frequency for the 6+2 mode of operation will be fSYS/64.
PWM
PWM Cycle PWM Cycle
Modulation
Frequency
Duty
fSYS/64 for (6+2) bits mode
f
SYS/256
[PWM]/256
f
SYS/128for (7+1) bits mode
Asingle register, known as PWM and located in the Data
Memory is assigned to the Pulse Width Modulator. It is
here that the 8-bit value, which represents the overall
duty cycle of one modulation cycle of the output wave-
form, should be placed. To increase the PWM modula-
tion frequency, each modulation cycle is subdivided into
two or four individual modulation subsections, known as
the 7+1 mode or 6+2 mode respectively. The required
mode and the on/off control for the PWM is selected us-
ing the CTRL0 register. Note that when using the PWM,
it is only necessary to write the required value into the
PWM register and select the required mode setup and
on/off control using the CTRL0 register, the subdivision
of the waveform into its sub-modulation cycles is imple-
mented automatically within the microcontroller hard-
ware. For all devices, the PWM clock source is the
6+2 PWM Mode
Each full PWM cycle, as it is controlled by an 8-bit PWM
register, has 256 clock periods. However, in the 6+2
PWM mode, each PWM cycle is subdivided into four in-
dividual sub-cycles known as modulation cycle 0 ~ mod-
ulation cycle 3, denoted as i in the table. Each one of
these four sub-cycles contains 64 clock cycles. In this
mode, a modulation frequency increase of four is
achieved. The 8-bit PWM register value, which repre-
sents the overall duty cycle of the PWM waveform, is di-
vided into two groups. The first group which consists of
bit2~bit7 is denoted here as the DC value. The second
group which consists of bit0~bit1 is known as the AC
value. In the 6+2 PWM mode, the duty cycle value of
each of the four modulation sub-cycles is shown in the
following table.
system clock fSYS
.
This method of dividing the original modulation cycle
into a further 2 or 4 sub-cycles enable the generation of
higher PWM frequencies which allow a wider range of
applications to be served. As long as the periods of the
generated PWM pulses are less than the time constants
of the load, the PWM output will be suitable as such long
time constant loads will average out the pulses of the
PWM output. The difference between what is known as
the PWM cycle frequency and the PWM modulation fre-
quency should be understood. As the PWM clock is the
system clock, fSYS, and as the PWM value is 8-bits wide,
the overall PWM cycle frequency is fSYS/256. However,
when in the 7+1 mode of operation the PWM modulation
frequency will be fSYS/128, while the PWM modulation
DC
Parameter
AC (0~3)
i<AC
(Duty Cycle)
DC+1
64
Modulation cycle i
(i=0~3)
DC
64
i³AC
6+2 Mode Modulation Cycle Values
The following diagram illustrates the waveforms associ-
ated with the 6+2 mode of PWM operation. It is impor-
tant to note how the single PWM cycle is subdivided into
4 individual modulation cycles, numbered from 0~3 and
how the AC value is related to the PWM value.
S
Y
S
[
P
W
M
]
=
1
0
0
P
W
M
2
5
/
6
4
2
5
/
6
4
2
5
/
6
4
2
5
/
6
4
2
2
2
2
5
6
6
6
/
/
/
/
6
6
6
6
4
4
4
4
[
P
W
M
]
=
1
0
1
P
W
M
2
2
2
6
6
6
/
/
/
6
6
6
4
4
4
2
5
/
6
4
2
5
/
6
4
2
5
/
6
4
[
P
W
M
]
=
1
0
2
P
W
M
2
6
/
6
4
2
5
/
6
4
2
5
/
6
4
[
P
W
M
]
=
1
0
3
P
W
M
2
6
/
6
4
2
6
/
6
4
2
5
/
6
4
P
W
M
m
o
d
u
l
a
t
i
o
n
p
e
r
i
o
d
:
6
4
/
f
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
0
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
1
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
2
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
3
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
0
P
W
M
c
y
c
l
e
:
2
5
6
/
f
6+2 PWM Mode
Rev. 1.00
24
September 21, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
