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HT46R01 参数 Datasheet PDF下载

HT46R01图片预览
型号: HT46R01
PDF下载: 下载PDF文件 查看货源
内容描述: 10引脚MSOP A / D型8位OTP MCU [10-Pin MSOP A/D Type 8-Bit OTP MCU]
分类和应用:
文件页数/大小: 60 页 / 482 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
 浏览型号HT46R01的Datasheet PDF文件第17页浏览型号HT46R01的Datasheet PDF文件第18页浏览型号HT46R01的Datasheet PDF文件第19页浏览型号HT46R01的Datasheet PDF文件第20页浏览型号HT46R01的Datasheet PDF文件第22页浏览型号HT46R01的Datasheet PDF文件第23页浏览型号HT46R01的Datasheet PDF文件第24页浏览型号HT46R01的Datasheet PDF文件第25页  
HT46R01/HT46R02/HT46R03  
Configuring the Event Counter Mode  
At this point the T0ON or T1ON bit, depending upon  
which counter is used, will be automatically reset to zero  
and the timer will stop counting. If the T0E or T1E bit is  
high, the timer will begin counting once a low to high  
transition has been received on the external timer pin  
and stop counting when the external timer pin returns to  
its original low level. As before, the T0ON or T1ON bit  
will be automatically reset to zero and the timer will stop  
counting. It is important to note that in the Pulse Width  
Measurement Mode, the T0ON or T1ON bit is automati-  
cally reset to zero when the external control signal on  
the external timer pin returns to its original level,  
whereas in the other two modes the T0ON or T1ON bit  
can only be reset to zero under program control. The re-  
sidual value in the timer, which can now be read by the  
program, therefore represents the length of the pulse re-  
ceived on the external timer pin. As the T0ON or T1ON  
bit has now been reset, any further transitions on the ex-  
ternal timer pin, will be ignored. Not until the T0ON or  
T1ON bit is again set high by the program can the timer  
begin further pulse width measurements. In this way,  
single shot pulse measurements can be easily made. It  
should be noted that in this mode the counter is con-  
trolled by logical transitions on the external timer pin and  
not by the logic level. As in the case of the other two  
modes, when the counter is full, the timer will overflow  
and generate an internal interrupt signal. The counter  
will also be reset to the value already loaded into the  
preload register. If the external timer pin is pin-shared  
with other I/O pins, to ensure that the pin is configured to  
operate as a pulse width measuring input pin, two things  
have to happen. The first is to ensure that the  
T0M1/T0M0 or T1M1/T1M0 bits place the Timer/Event  
Counter in the pulse width measuring mode, the second  
is to ensure that the port control register configures the  
pin as an input. It should be noted that a timer overflow  
and corresponding timer interrupt is one of the wake-up  
sources. Note that the timer interrupts can be disabled  
by ensuring that the ET0I or ET1I bits in the INTC0 reg-  
ister are reset to zero.  
In this mode, a number of externally changing logic  
events, occurring on the external timer pin, can be re-  
corded by the internal timer. For the timer to operate in  
the event counting mode, the bit pair, T0M1/T0M0 or  
T1M1/T1M0, depending upon which timer is used, must  
be set to 0 and 1 respectively. The timer-on bit T0ON or  
T1ON, depending upon which timer is used, must be set  
high to enable the timer to count. Depending upon which  
counter is used, if T0E or T1E is low, the counter will in-  
crement each time the external timer pin receives a low  
to high transition. If T0E or T1E is high, the counter will  
increment each time the external timer pin receives a  
high to low transition. As in the case of the other two  
modes, when the counter is full, the timer will overflow  
and generate an internal interrupt signal. The counter  
will then preload the value already loaded into the  
preload register. As the external timer pins are  
pin-shared with other I/O pins, to ensure that the pin is  
configured to operate as an event counter input pin, two  
things have to happen. The first is to ensure that the  
T0M1/T0M0 or T1M1/T1M0 bits place the Timer/Event  
Counter in the event counting mode, the second is to en-  
sure that the port control register configures the pin as  
an input. It should be noted that a timer overflow is one  
of the interrupt and wake-up sources. Note that the timer  
interrupts can be disabled by ensuring that the ET0I or  
ET1I bits in the INTC0 register are reset to zero.  
Configuring the Pulse Width Measurement Mode  
In this mode, the width of external pulses applied to the  
external timer pin can be measured. In the Pulse Width  
Measurement Mode the timer clock source is supplied  
by the internal clock. For the timer to operate in this  
mode, the bit pair, T0M1/T0M0 or T1M1/T1M0, depend-  
ing upon which timer is used, must both be set high. De-  
pending upon which counter is used, if the T0E or T1E  
bit is low, once a high to low transition has been received  
on the external timer pin, the timer will start counting un-  
til the external timer pin returns to its original high level.  
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Event Counter Mode Timing Chart  
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Pulse Width Measure Mode Timing Chart  
Rev. 1.00  
21  
September 21, 2007  
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