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HT45F43 参数 Datasheet PDF下载

HT45F43图片预览
型号: HT45F43
PDF下载: 下载PDF文件 查看货源
内容描述: 8位闪存微控制器与运算放大器和比较器 [8-Bit Flash MCU with Op Amps & Comparators]
分类和应用: 闪存比较器微控制器运算放大器
文件页数/大小: 152 页 / 851 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT45F23/HT45F43  
8-Bit Flash MCU with Op Amps & Comparators  
Programming Considerations  
The HXT and LXT oscillators both use the same SST counter. For example, if the system is woken up  
from the SLEEP0 Mode and both the HXT and LXT oscillators need to start-up from an off state. The  
LXT oscillator uses the SST counter after HXT oscillator has finished its SST period.  
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If the device is woken up from the SLEEP0 Mode to the NORMAL Mode, the high speed system  
oscillator needs an SST period. The device will execute first instruction after HTO is ²1². At this  
time, the LXT oscillator may not be stability if fSUB is from LXT oscillator. The same situation occurs  
in the power-on state. The LXT oscillator is not ready yet when the first instruction is executed.  
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If the device is woken up from the SLEEP1 Mode to NORMAL Mode, and the system clock source  
is from HXT oscillator and FSTEN is ²1², the system clock can be switched to the LXT or LIRC  
oscillator after wake up.  
There are peripheral functions, such as WDT, TMs and SIM, for which the fSYS is used. If the system  
clock source is switched from fH to fL, the clock source to the peripheral functions mentioned above  
will change accordingly.  
The on/off condition of fSUB and fS depends upon whether the WDT is enabled or disabled as the  
WDT clock source is selected from fSUB  
.
Watchdog Timer  
The Watchdog Timer is provided to prevent program malfunctions or sequences from jumping to  
unknown locations, due to certain uncontrollable external events such as electrical noise.  
Watchdog Timer Clock Source  
The Watchdog Timer clock source is provided by the internal clock, fS, which is in turn supplied by one  
of two sources selected by configuration option: fSUB or fSYS/4. The fSUB clock can be sourced from either  
the LXT or LIRC oscillators, again chosen via a configuration option. The Watchdog Timer source  
clock is then subdivided by a ratio of 213 to 220 to give longer timeouts, the actual value being chosen  
using the WS2~WS0 bits in the WDTC register. The LIRC internal oscillator has an approximate  
period of 32kHz at a supply voltage of 5V.  
However, it should be noted that this specified internal clock period can vary with VDD, temperature  
and process variations. The LXT oscillator is supplied by an external 32.768kHz crystal. The other  
Watchdog Timer clock source option is the fSYS/4 clock. The Watchdog Timer clock source can  
originate from its own internal LIRC oscillator, the LXT oscillator or fSYS/4. It is divided by a value of  
213 to 220, using the WS2~WS0 bits in the WDTC register to obtain the required Watchdog Timer  
time-out period.  
Rev. 1.20  
49  
September 15, 2011