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HT45F43 参数 Datasheet PDF下载

HT45F43图片预览
型号: HT45F43
PDF下载: 下载PDF文件 查看货源
内容描述: 8位闪存微控制器与运算放大器和比较器 [8-Bit Flash MCU with Op Amps & Comparators]
分类和应用: 闪存比较器微控制器运算放大器
文件页数/大小: 152 页 / 851 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT45F23/HT45F43  
8-Bit Flash MCU with Op Amps & Comparators  
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In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,  
will be cleared.  
Standby Current Considerations  
As the main reason for entering the SLEEP or IDLE Mode is to keep the current consumption of the  
device to as low a value as possible, perhaps only in the order of several micro-amps except in the  
IDLE1 Mode, there are other considerations which must also be taken into account by the circuit  
designer if the power consumption is to be minimised. Special attention must be made to the I/O pins  
on the device. All high-impedance input pins must be connected to either a fixed high or low level as  
any floating input pins could create internal oscillations and result in increased current consumption.  
This also applies to devices which have different package types, as there may be unbonbed pins. These  
must either be setup as outputs or if setup as inputs must have pull-high resistors connected.  
Care must also be taken with the loads, which are connected to I/O pins, which are setup as outputs.  
These should be placed in a condition in which minimum current is drawn or connected only to  
external circuits that do not draw current, such as other CMOS inputs. Also note that additional  
standby current will also be required if the configuration options have enabled the LXT or LIRC  
oscillator.  
In the IDLE1 Mode the system oscillator is on, if the system oscillator is from the high speed system  
oscillator, the additional standby current will also be perhaps in the order of several hundred  
micro-amps  
Wake-up  
After the system enters the SLEEP or IDLE Mode, it can be woken up from one of various sources  
listed as follows:  
·
An external reset  
·
·
·
An external falling edge on Port A  
A system interrupt  
A WDT overflow  
If the system is woken up by an external reset, the device will experience a full system reset, how-  
ever, if the device is woken up by a WDT overflow, a Watchdog Timer reset will be initiated. Al-  
though both of these wake-up methods will initiate a reset operation, the actual source of the  
wake-up can be determined by examining the TO and PDF flags. The PDF flag is cleared by a sys-  
tem power-up or executing the clear Watchdog Timer instructions and is set when executing the  
²HALT² instruction. The TO flag is set if a WDT time-out occurs, and causes a wake-up that only re-  
sets the Program Counter and Stack Pointer, the other flags remain in their original status.  
Each pin on Port A can be setup using the PAWU register to permit a negative transition on the pin to  
wake-up the system. When a Port A pin wake-up occurs, the program will resume execution at the  
instruction following the ²HALT² instruction. If the system is woken up by an interrupt, then two  
possible situations may occur. The first is where the related interrupt is disabled or the interrupt is enabled  
but the stack is full, in which case the program will resume execution at the instruction following the  
²HALT² instruction. In this situation, the interrupt which woke-up the device will not be immediately  
serviced, but will rather be serviced later when the related interrupt is finally enabled or when a stack  
level becomes free. The other situation is where the related interrupt is enabled and the stack is not full, in  
which case the regular interrupt response takes place. If an interrupt request flag is set high before  
entering the SLEEP or IDLE Mode, the wake-up function of the related interrupt will be disabled.  
Rev. 1.20  
48  
September 15, 2011