HT45FH4M
Lithium Battery Backup Power ASSP MCU
Power on Reset Electrical Characteristics
Ta=ꢀ25°C
Test Conditions
Conditions
Symbol
VPOR
RPOR
tPOR
Parameter
Min.
Typ.
Max.
Unit
VDD
VDD Staꢁt Voltage to Ensꢀꢁe
Poweꢁ-on Reset
—
—
—
—
—
0.0ꢆꢃ
1
—
—
—
100
—
mV
V/ms
ms
VDD Rising Rate to Ensꢀꢁe
Poweꢁ-on Reset
—
—
Minimꢀm Time foꢁ VDD Staꢂs at
VPOR to Ensꢀꢁe Poweꢁ-on Reset
—
V
D
D
t
P
R
O
R
V
R
D
D
V
P
R
O
T
m
i
System Architecture
Aꢀkeyꢀfactorꢀinꢀtheꢀhigh-performanceꢀfeaturesꢀofꢀtheꢀHoltekꢀrangeꢀofꢀmicrocontrollersꢀisꢀattributedꢀ
toꢀtheirꢀinternalꢀsystemꢀarchitecture.ꢀTheꢀdeviceꢀtakesꢀadvantageꢀofꢀtheꢀusualꢀfeaturesꢀfoundꢀwithinꢀ
RISCꢀmicrocontrollersꢀprovidingꢀincreasedꢀspeedꢀofꢀoperationꢀandꢀenhancedꢀperformance.ꢀTheꢀ
pipeliningꢀschemeꢀisꢀimplementedꢀinꢀsuchꢀaꢀwayꢀthatꢀinstructionꢀfetchingꢀandꢀinstructionꢀexecutionꢀ
areꢀoverlapped,ꢀhenceꢀinstructionsꢀareꢀeffectivelyꢀexecutedꢀinꢀoneꢀcycle,ꢀwithꢀtheꢀexceptionꢀofꢀbranchꢀ
orꢀcallꢀinstructions.ꢀAnꢀ8-bitꢀwideꢀALUꢀisꢀusedꢀinꢀpracticallyꢀallꢀinstructionꢀsetꢀoperations,ꢀwhichꢀ
carriesꢀoutꢀarithmeticꢀoperations,ꢀlogicꢀoperations,ꢀrotation,ꢀincrement,ꢀdecrement,ꢀbranchꢀdecisions,ꢀ
etc.ꢀTheꢀinternalꢀdataꢀpathꢀisꢀsimplifiedꢀbyꢀmovingꢀdataꢀthroughꢀtheꢀAccumulatorꢀandꢀtheꢀALU.ꢀ
CertainꢀinternalꢀregistersꢀareꢀimplementedꢀinꢀtheꢀDataꢀMemoryꢀandꢀcanꢀbeꢀdirectlyꢀorꢀindirectlyꢀ
addressed.ꢀTheꢀsimpleꢀaddressingꢀmethodsꢀofꢀtheseꢀregistersꢀalongꢀwithꢀadditionalꢀarchitecturalꢀ
featuresꢀensureꢀthatꢀaꢀminimumꢀofꢀexternalꢀcomponentsꢀisꢀrequiredꢀtoꢀprovideꢀaꢀfunctionalꢀI/Oꢀandꢀ
A/Dꢀcontrolꢀsystemꢀwithꢀmaximumꢀreliabilityꢀandꢀflexibility.ꢀThisꢀmakesꢀtheꢀdeviceꢀsuitableꢀforꢀlow-
cost,ꢀhigh-volumeꢀproductionꢀforꢀcontrollerꢀapplications.
Clocking and Pipelining
Theꢀmainꢀsystemꢀclock,ꢀderivedꢀfromꢀeitherꢀanꢀHIRCꢀorꢀLIRCꢀoscillatorꢀisꢀsubdividedꢀintoꢀfourꢀ
internallyꢀgeneratedꢀnon-overlappingꢀclocks,ꢀT1~T4.ꢀTheꢀProgramꢀCounterꢀisꢀincrementedꢀatꢀtheꢀ
beginningꢀofꢀtheꢀT1ꢀclockꢀduringꢀwhichꢀtimeꢀaꢀnewꢀinstructionꢀisꢀfetched.ꢀTheꢀremainingꢀT2~T4ꢀ
clocksꢀcarryꢀoutꢀtheꢀdecodingꢀandꢀexecutionꢀfunctions.ꢀInꢀthisꢀway,ꢀoneꢀT1~T4ꢀclockꢀcycleꢀformsꢀ
oneꢀinstructionꢀcycle.ꢀAlthoughꢀtheꢀfetchingꢀandꢀexecutionꢀofꢀinstructionsꢀtakesꢀplaceꢀinꢀconsecutiveꢀ
instructionꢀcycles,ꢀtheꢀpipeliningꢀstructureꢀofꢀtheꢀmicrocontrollerꢀensuresꢀthatꢀinstructionsꢀareꢀ
effectivelyꢀexecutedꢀinꢀoneꢀinstructionꢀcycle.ꢀTheꢀexceptionꢀtoꢀthisꢀareꢀinstructionsꢀwhereꢀtheꢀ
contentsꢀofꢀtheꢀProgramꢀCounterꢀareꢀchanged,ꢀsuchꢀasꢀsubroutineꢀcallsꢀorꢀjumps,ꢀinꢀwhichꢀcaseꢀtheꢀ
instructionꢀwillꢀtakeꢀoneꢀmoreꢀinstructionꢀcycleꢀtoꢀexecute.
Rev. 1.10
14
�anꢀaꢁꢂ 1ꢃꢄ ꢅ01ꢆ