HT45FH4M
Lithium Battery Backup Power ASSP MCU
Test Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
Conditions
ꢆV VOH= 0.9VDD
ꢃV VOH= 0.9VDD
-8
-16
-40
—
—
mA
mA
I/O Poꢁt Soꢀꢁce Cꢀꢁꢁent
(PB4ꢄ PBꢃ)
IOHꢅ
-ꢅ0
-ꢃ%×
Tꢂp.
-ꢃ%×
Tꢂp.
VLVR
Low Voltage Reset Voltage
—
—
ꢅ.ꢃꢃ
V
VLVD1
VLVDꢅ
VLVDꢆ
VLVD4
VLVDꢃ
LVDEN= 1ꢄ VLVD = ꢅ.7V
LVDEN= 1ꢄ VLVD = ꢆ.0V
LVDEN= 1ꢄ VLVD = ꢆ.ꢆV
LVDEN= 1ꢄ VLVD = ꢆ.6V
LVDEN= 1ꢄ VLVD = 4.0V
ꢅ.7
ꢆ.0
ꢆ.ꢆ
ꢆ.6
4.0
ꢆ0
V
V
Low Voltage Detectoꢁ
Voltage
-ꢃ%×
Tꢂp.
-ꢃ%×
Tꢂp.
—
V
V
V
Additional Poweꢁ
Consꢀmption if LVR is
ꢀsed
ꢆV
ꢃV
—
—
4ꢃ
90
μA
ILVR
LVR enable
60
μA
ꢆV
ꢃV
ꢆV
ꢃV
—
—
ꢅ0
10
ꢆ0
60
60
ꢆ0
4ꢃ
90
μA
μA
kΩ
kΩ
Additional Poweꢁ
Consꢀmption if LVD is ꢀsed
LVD disable → LVD enable
(LVR enable)
ILVD
—
—
100
ꢃ0
Pꢀll-high Resistance foꢁ
I/O Poꢁts
RPH
Note:ꢀLVRꢀisꢀawaysꢀenabledꢀ(HALTꢀmodeꢀdisabled)ꢀfixed@2.55V.
A.C. Characteristics
Ta=ꢀ25°C
Test Conditions
Symbol
Parameter
Min.
Typ.
Max. Unit
VDD
Conditions
ꢅ.7V~ꢃ.ꢃV
4.ꢃV~ꢃ.ꢃV
ꢅ.7V~ꢃ.ꢃV
4.ꢃV~ꢃ.ꢃV
ꢃV
DC
DC
—
—
—
—
ꢆ0
ꢆ0
ꢆ0
ꢆꢅ
ꢆꢅ
7.ꢃ
1ꢃ
MHz
MHz
MHz
MHz
fCPU
Opeꢁating Clock
—
—
7.ꢃ
1ꢃ
fSYS
Sꢂstem Clock (HIRC)
HIRC Fꢁeqꢀencꢂ (note)
Sꢂstem Clock (LIRC)
—
—
Ta= ꢅꢃ°C
-ꢅ%
-ꢃ%
-10%
-10%
-ꢆ0%
+ꢅ% MHz
+ꢃ% MHz
+10% MHz
+10% kHz
+60% kHz
fHIRC
4.0V~ꢃ.ꢃV Ta= -10°C~8ꢃ°C
ꢆ.6V~ꢃ.ꢃV Ta= -40°C~8ꢃ°C
ꢃV
Ta= ꢅꢃ°C
fSUB
ꢅ.7V~ꢃ.ꢃV Ta= -40°C~8ꢃ°C
TCKn Inpꢀt Pin Minimꢀm
Pꢀlse Width
tTIMER
—
—
—
ꢆ0
—
ns
tINT
tLVR
tLVD
Inteꢁꢁꢀpt Minimꢀm Pꢀlse Width
Low Voltage Width to Reset
Low Voltage Width to Inteꢁꢁꢀpt
—
—
—
—
—
—
1
ꢆ.ꢆ
ꢅ40
4ꢃ
ꢃ
μs
μs
μs
1ꢅ0
ꢅ0
480
90
Foꢁ LVR enableꢄ
LVD off → on
tLVDS
LVDO Stable Time
—
1ꢃ
—
—
μs
tSRESET
tEERD
Softwaꢁe Reset Width to Reset
EEPROM Read Time
—
—
—
—
—
4ꢃ
—
—
—
90
ꢅ
1ꢅ0
4
μs
tSYS
ms
tSYS
—
—
tEEWR
EEPROM Wꢁite Time
ꢅ
4
Sꢂstem Staꢁt-ꢀp Timeꢁ Peꢁiod
(Wake-ꢀp fꢁom HALTꢄ fSYS off
at HALT state)
fSYS= HIRC
16
—
—
fSYS= LIRC
—
ꢅ
—
tSYS
tSST
Sꢂstem Staꢁt-ꢀp Timeꢁ Peꢁiod
(Wake-ꢀp fꢁom HALTꢄ fSYS on
at HALT state)
—
—
—
ꢅ
—
tSYS
Rev. 1.10
11
�anꢀaꢁꢂ 1ꢃꢄ ꢅ01ꢆ