ꢃꢅ-bit �RM Coꢁtex™-Mꢃ MCU
HTꢃꢅF1ꢅ51/51B/5ꢅ/5ꢃ
Pins
Description
AF1
IO
Pin
Name
Type
Level
48
LQFP
Default function
(AF0)
(Note1)
AF2
AF3
(Note2)
PB1ꢃ
PB14
PB15
PB0
ꢃꢅ
I/O
5V-T
GPIO PB1ꢃ
GPIO PB14
GPIO PB15
XT�LIN
SPI_SCK
SPI_MISO
SPI_MOSI
PB0
UR_DSR
UR_DTR
UR_RI
GT1_CHꢅ
GT1_CH1
GT1_CH0
ꢃꢃ
ꢃ4
ꢃ5
ꢃ6
ꢃ7
ꢃ8
ꢃ9
40
41
4ꢅ
4ꢃ
44
45
46
47
48
I/O
I/O
I/O
I/O
P
5V-T
5V-T
PB1
XT�LOUT
PB1
VDD18
N.C
1.8 V voꢂtage foꢁ coꢁe
PBꢅ
I/O
I/O
I/O
I/O
I/O
I/O
P
GPIO PBꢅ
GPIO PBꢃ
GPIO PB4
GPIO PB5
GPIO PB6
GPIO PB7
CN0
GT1_CH0
GT1_CH1
PBꢃ
CP0
PB4
�OUT0
CN1
UR_RTS/TXE GT1_CHꢅ
GT1_CHꢃ
PB5
PB6
CP1
GT1_ETI
PB7
�OUT1
UR_CTS/SCK GT0_ETI
VDDꢃꢃ_1
VSSꢃꢃ_1
VDD�
ꢃ.ꢃ V voꢂtage foꢁ digitaꢂ I/O
P
Gꢁound ꢁefeꢁence foꢁ digitaꢂ I/O
P
ꢃ.ꢃ V anaꢂog voꢂtage foꢁ �DC and OP�/Comꢀaꢁatoꢁ
Gꢁound ꢁefeꢁence foꢁ �DC and OP�/Comꢀaꢁatoꢁ
VSS�_1
P
NOTES: 1. I = inꢀutꢄ O = outꢀutꢄ P = ꢀoweꢁ suꢀꢀꢂy.
2. 5V-T = 5V toꢂeꢁant.
3. HTꢃꢅF1ꢅ51B does not incꢂude the VB�Tꢄ XT�LꢃꢅKIN and XT�LꢃꢅKOUT ꢀins.
4. The GPIOs aꢁe in �F0 state afteꢁ VDD18 ꢀoweꢁ on ꢁeset (POR) exceꢀt the RTCOUT ꢀin of Backuꢀ
Domain I/O. The RTCOUT ꢀin is ꢁeset by the Backuꢀ Domain ꢀoweꢁ-on-ꢁeset (PORB) oꢁ Backuꢀ
Domain softwaꢁe ꢁeset (B�K_RST bit in B�K_CR ꢁegisteꢁ).
5. The backuꢀ domain of I/O ꢀins has dꢁiving cuꢁꢁent caꢀabiꢂity ꢂimitation (< 1m� @ VB�T = ꢃ.ꢃV).
Rev. 1.10
ꢅ1 of ꢃ5
�ꢀꢁiꢂ 1ꢃꢄ ꢅ01ꢅ