ꢃꢅ-bit �RM Coꢁtex™-Mꢃ MCU
HTꢃꢅF1ꢅ51/51B/5ꢅ/5ꢃ
Block Diagram
SWDIO
SWCLK
BOOT0
BOOT1
�F
TR�CESWO
�F
�F
TPIU
SW-DP
POR
1.8 V
Fꢂash
Memoꢁy
Contꢁoꢂꢂeꢁ
PLL
Fꢂash
Memoꢁy
CoꢁtexTM-Mꢃ
fMax: 144 MHz
VDD18
Pꢁocessoꢁ
Poweꢁed by 1.8 V
fMax: 7ꢅ MHz
VLDOOUT
FMC Contꢁoꢂ
Registeꢁs
CKCU/RSTCU
Contꢁoꢂ Registeꢁs
LDO
1.8 V
VLDOIN
VSSLDO
NVIC
Masteꢁ
�HB Peꢁiꢀheꢁaꢂs
Sꢂave
HSI
8 MHz
SR�M
Contꢁoꢂꢂeꢁ
XT�LIN
XT�LOUT
SR�M
HSE
4 ~ 16 MHz
Sꢂave
Sꢂave
BOD
LVD
�HB to �PB
Bꢁidge
Poweꢁed by ꢃ.ꢃ V
UR_TXꢄ UR_RX
UR_DCD
UR_DSR
UR_DTR
UR_RI
UR_RTS/TXE
UR_CTS/SCK
IꢅC_SD�
IꢅC_SCL
US�RT
SPI
IꢅC
SPI_MOSI
SPI_MISO
SPI_SCK
SPI_SEL
WDT
GT0_CH0
�DC_IN0
1ꢅ-bit
S�R �DC
�DC
GPTM0
GPTM1
GT0_CHꢃ
GT0_ETI
�DC_IN7
CN0ꢄ CP0
�OUT0
CN1ꢄ CP1
�OUT1
GT1_CH0
�naꢂog
OP�/CMP
OP�/CMP
GPIO�
GT1_CHꢃ
GT1_ETI
VDD�
VSS�
Poweꢁed by VDD�
RTC
RTCOUT
PWRSW
VB�K
P� [15:0]
PB [15:0]
VB�T
GPIOB
�FIO
VLDOIN
PWRCU
PORB
VB�K ꢃ.ꢃ V
LSI
ꢃꢅ kHz
W�KEUP
nRST
Poweꢁ suꢀꢀꢂy:
LSE
ꢃꢅꢄ768 Hz
Bus:
EXTI
BREG
Contꢁoꢂ signaꢂ:
�ꢂteꢁnate function:
Poweꢁed by 1.8 V
Poweꢁed by VB�K
�F
�F
XT�LꢃꢅKIN
NOTE: HTꢃꢅF1ꢅ51B does not incꢂude the VB�Tꢄ XT�LꢃꢅKIN and XT�LꢃꢅKOUT ꢀins.
Figure 1. HT32F125x Block Diagram
Rev. 1.10
15 of ꢃ5
�ꢀꢁiꢂ 1ꢃꢄ ꢅ01ꢅ
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
