HT48RA0-3/HT48CA0-3
The output from the REM pin is as follows, in accordance with the values set to bit 9 (CARY) of CARH and the timer
output enable flag (t9), and the value of the timer block¢s 9-bit down counter (t0 to t8).
CARH1.1
(CARY)
Timer Output Enable Flag
(t9: TSR1.1)
9-bit Down Counter
REM Pin
(TSR0.0~TSR0.7, TSR1.0)
0
0
0
0
1
1
0
0
1
1
0
1
0
Low-level output
Other than 0
0
64/fsys (with carrier output)
Carrier output (Note)
Low-level output
Other than 0
¾
¾
High-level output
Note: Input values in the range of 001H to 1FFH to CARH (CARH1.0, CARH0.7~CARH0.0) and
CARL (CARL1.0, CARL0.7~CARL0.0).
Caution: CARH (CARH1.0, CARH0.7~CARH0.0) and CARL (CARL1.0, CARL0.7~CARL0.0) must be set while the
REM pin is low level (t9 = 0 or t0 to t8 = 0).
CARH (CARH1.0,
CARL (CARL1.0,
fC (kHz)
tH (ms)
tL (ms)
Duty
t (ms)
CARH0.7~CARH0.0) CARL0.7~CARL0.0)
01H
03H
09H
13H
20H
21H
22H
22H
22H
23H
24H
34H
3BH
63H
7FH
01H
05H
09H
13H
20H
41H
44H
45H
46H
48H
49H
6AH
3BH
63H
7FH
0.5
1.0
0.5
1.5
1.0
2.5
1000
400
200
100
60.6
40
1/2
2/5
1/2
1/2
1/2
1/3
1/3
1/3
1/3
1/3
1/3
1/3
1/2
1/2
1/2
2.5
2.5
5.0
5.0
5.0
10.0
16.5
25
8.25
8.25
8.75
8.75
8.8
8.25
16.75
17.25
17.5
17.6
18.25
18.52
26.66
15.0
25.0
32.0
26.0
26.25
26.4
27.25
27.78
40.0
30.0
50.0
64.0
38.5
38.10
37.9
36.7
36.0
25
9.0
9.26
13.33
15.0
25.0
32.0
33.3
20
15.6
Carrier Frequency Setting (fSYS=4MHz)
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Rev.1.10
14
October 12, 2007