HMC1190LP6GE
v01.1112
BROADBAND HIGH IP3 DUAL CHANNEL DOWNCONVERTER
w/ Fractional-N PLL & VCO, 0.7 - 3.5 GHz
Table 17. Reg 11h SAR Register (Read Only)
BIT
TYPE
NAME
W
DEFLT
DESCRIPTION
SAR Error Magnitude Count
2
19- 1d
[18:0]
R
SAR Error Magnitude Count
19
7FFFFh
SAR Error Sign
0: positive
[19]
R
SAR Error Sign
1
0
1: negative
Table 18. Reg 12h GPO/LD Register (Read Only)
BIT
TYPE
NAME
W
DEFLT
DESCRIPTION
[0]
R
R
GPO Out
1
0
0
GPO Output
[1]
Lock Detect Out
1
Lock Detect Output
[4:2]
R
Reserved
3
Reserved
7h
Table 19. Reg 13h BIST Register (Read Only)
BIT
TYPE
NAME
W
DEFLT
DESCRIPTION
DESCRIPTION
4697d
1259h
[16:0]
R
Reserved
16
Reserved
Table 20. Reg 14h Auxiliary SPI Register Default
BIT
TYPE
R/W
R/W
R/W
R/W
NAME
W
DEFLT
1- Use the 3 outputs as an SPI port
0- Use the 3 outputs as a static GPO port
[0]
Aux SPI Mode
Aux GPO Values
Aux GPO 3.3 V
Reserved
1
0
0
0
1
[3:1]
[4]
3
Output values when Reg 07h[1] = 1
0- 1.8 V output out of the Auxiliary GPO pins when Reg 10h[1] = 1
1- 3.3 V output out of the Auxiliary GPO pins when [1] = 1
1
[8:5]
4
Reserved
When set, CHIP_EN pin is used as a trigger for phase
synchronization. Can be used to synchronize multiple
HMC1190LP6GE, or to along with the Reg 20h value to phase step
the output.
[9]
R/W
R/W
R/W
Phase Sync
Aux SPI GPO Output
Aux SPI Outputs
1
2
2
1
0
0
(Exact Frequency Mode must be enabled)
Option to send GPO multiplexed data (ex Lock Detect) to one of the
auxiliary outputs
0- None
1 - to [0]
2 - to [1]
[11:10]
[13:12]
3 - to [2]
When disabled:
0 - Outputs Hi Z
2 - Outputs stay driven
3 - Outputs driven to high
4 - Outputs driven to low
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
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