HMC1031MS8E
v00.0312
CLOCK GENERATOR WITH INTEGER-N PLL
0.1 - 500 MHz
Typical Performance Characteristics
t
a
= +25 °C, VCC = 3.3 V, Unless otherwise specified.
CloCk Generators - sMt
Figure 1. 10 MHz to 100 MHz with Noisy
Reference Phase Noise
]
-40
-60
PHASE NOISE (dBc/Hz)
-80
-100
-120
-140
-160
-180
10
100
1000
10000
OFFSET (Hz)
100000
1000000
12KHz - 20MHz Integrated Jitter
HMC1031/VCXO: 55 fsec
10MHz Input: 4 psec
100 MHz VCXO Locked with Tiny PLL
10 MHz Noisy Ref
Figure 2. 10MHz to 50MHz with Noisy
Reference Phase Noise
-20
-40
PHASE NOISE (dBc/Hz)
-60
-80
-100
-120
-140
-160
-180
10
100
1000
10000
OFFSET (Hz)
100000
1000000
12KHz to 20MHz Integrated Jitter
HMC1031/VCXO: 190 fsec
10MHz iInput: 4 psec
50 MHz VCXO Locked with Tiny PLL
10 MHz Noisy Ref
Open Loop VCXO Phase Noise
Figure 3. 10MHz to 100MHz with Very
Noisy Reference Phase Noise
-20
-40
PHASE NOISE (dBc/Hz)
-60
-80
-100
-120
-140
-160
-180
1
10
100
1000
10000
OFFSET (Hz)
100000
1000000
12KHz to 20MHz Integrated Jitter
HMC1031/VCXO: 57.8 fsec
10MHz iInput: 16.2 psec
Open Loop VCXO Phase Noise
10 MHz Very Noisy Ref
100 MHz VCXO Locked with Tiny PLL
Figure 4. Typical Close Loop Phase
Noise, HMC1031MS8E as Jitter
p
Attenuator, Loop Bandwidth 100 Hz
-20
-40
PHASE NOISE (dBc/Hz)
-60
-80
-100
-120
-140
-160
-180
1
12KHz to 20MHz Integrated Jitter
HMC1031/VCXO: 212 fsec
Sim Model
Sim VCXO Response
Sim PLL Contribution
Sim Reference Response
Total Measured Phase Noise
Free Running Bliley 50MHz
10 MHz Noisy Reference
10
10
2
10
3
10
4
10
5
10
6
10
7
10
8
Figure 5.
Phase Error during Lock Time
for DIV 5, 10 MHz IN,50 MHz OUT, Loop
Bandwidth 100 Hz
200
Figure 6.
Frequency Error during Lock Time
for DIV 5, 10 MHz IN,50 MHz OUT, Loop
Bandwidth 100 Hz
1000
500
OFFSET (Hz)
PHASE ERROR (DEGREE)
100
FREQUENCY ERROR (Hz)
0
10
20
30
40
50
60
70
80
0
0
-500
-100
-1000
-1500
-200
-2000
0
10
20
30
40
TIME (msec)
50
60
70
80
TIME (msec)
[1]
[2]
[3]
[4]
loop Filter Value: C1 4.7 μF, r2 1.2 kΩ, C2 62 μF for loop Filter bandwidth 8 Hz, VCXo: Crystek CVHD-950 100 MHz
Loop Filter Value: C1 220 nF, R2 3.3 KΩ, C2 2.2 μF for Loop Filter bandwidth 50 Hz, VCXO: Bliley V105ACACB 50 MHz
loop Filter Value refer to loop Filter Configuration table no 1. VCXo: Crystek CVHD-950 100MHz
loop Filter Value refer to loop Filter Configuration table no 2. simulated data is generated from Hittite Pll Design software.
3
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
HITTITE [ HITTITE MICROWAVE CORPORATION ]
