HMC1031MS8E
v00.0312
CLOCK GENERATOR WITH INTEGER-N PLL
0.1 - 500 MHz
Pin Descriptions
Pin number
Function
VCC
Description
supply voltage typical +3.3 V
Interface schematic
CloCk Generators - sMt
1
2
reFIn
reference input, externally aC coupled reference
frequency input
3
lkDoP
lock Detect output, CMos drive
4, 5
D0, D1
CMos inputs used to specify integer-n division ratio
6
VCoIn
VCo input, aC coupled VCo/VCXo input
7
CP
Charge Pump output
8
GnD
7
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