; Execute prewrite
PREWRT: MOV.W
@R2+,
#H'00,
#H'a,
R6L
#H'00
R1H,
R3
R6L
R5
; Prewrite starting address
; Prewrite-verify fail counter
; Prewrite-verify loop counter
; Prewrite-verify fail counter + 1 → R6L
;
PREW:
MOV.B
MOV.W
PREWRS: INC
MOV.B
R1H
@R3
MOV.B
MOV.W
; Write H'00
;
#H'A578, R4
MOV.W
MOV.W
R4,
R5,
@TCSR
R4
; Start watchdog timer
; Set prewrite loop counter
BSET
LOOPR1: SUBS
MOV.W
#0,
#1,
R4,
@FLMCR:8 ; Set P bit
R4
R4
;
;
BNE
BCLR
LOOPR1
#0,
; Wait loop
@FLMCR:8 ; Clear P bit
MOV.W
MOV.W
#H'A500, R4
;
R4,
@TCSR
; Stop watchdog timer
MOV.B
LOOPR2: DEC
BNE
#H'c,
R4H
LOOPR2
@R3,
PWVFOK
#H'32,
ABEND1
PREWRS
R4H
; Set prewrite-verify loop counter
;
; Wait loop
MOV.B
BEQ
CMP.B
BEQ
R1H
R6L
; Read data = H'00?
; If read data = H'00 branch to PWVFOK
; Prewrite-verify executed 50 times?
; If prewrite-verify executed 50 times, branch to ABEND1
; Prewrite again
BRA
ABEND1: Programming error
PWVFOK: ADDS
MOV.W
#1,
@R2,
R4,
R3
R4
R3
; Address + 1 → R3
; Top address of next block
; Last address?
CMP.W
BNE
PWADD2: INC
BRA
PREW
R1L
PRETST
; If not last address, prewrite next address
; Used to test R1L+1 bit in R0
; Branch to PRETST
; Execute erase
ERASES: MOV.W
MOV.W
#H'0000, R6
; Erase-verify fail counter
; Set erase loop count
; Erase-verify fail counter + 1 → R6
;
; Start watchdog timer
; Set erase loop counter
#H'd,
#1,
#H'e,
R4,
R5
R6
R4
@TCSR
R4
ERASE:
ADDS
MOV.W
MOV.W
MOV.W
BSET
NOP
R5,
#1,
@FLMCR:8 ; Set E bit
LOOPE:
NOP
NOP
NOP
SUBS
MOV.W
BNE
BCLR
MOV.W
MOV.W
#1,
R4,
R4
R4
;
;
LOOPE
#1,
#H'A500, R4
R4, @TCSR
; Wait loop
@FLMCR:8 ; Clear E bit
;
; Stop watchdog timer
407
HITACHI [ HITACHI SEMICONDUCTOR ]
