Automatic Alignment of SCI Bit Rate
Start
bit
Stop
bit
D0
D1
D2D3
D4
D5
D6
D7
This low period (9 bits) is measured (H'00 data)
High for at
least 1 bit
Figure 19.5 Measurement of Low Period in Data Transmitted from Host
When started in boot mode, the H8/3434F measures the low period in asynchronous SCI data
transmitted from the host (figure 19.5). The data format is eight data bits, one stop bit, and no
parity bit. From the measured low period (9 bits), the H8/3434F computes the host’s bit rate. After
aligning its own bit rate, the H8/3434F sends the host 1 byte of H'00 data to indicate that bit-rate
alignment is completed. The host should check that this alignment-completed indication is
received normally and send one byte of H'55 back to the H8/3434F. If the alignment-completed
indication is not received normally, the H8/3434F should be reset, then restarted in boot mode to
measure the low period again. There may be some alignment error between the host’s and
H8/3434F’s bit rates, depending on the host’s bit rate and the H8/3434F’s system clock frequency.
To have the SCI operate normally, set the host’s bit rate to 2400, 4800, or 9600 bps*1. Table 19.8
lists typical host bit rates and indicates the clock-frequency ranges over which the H8/3434F can
align its bit rate automatically. Boot mode should be used within these frequency ranges*2.
Table 19.8 System Clock Frequencies Permitting Automatic Bit-Rate Alignment by
H8/3434F
System Clock Frequencies Permitting Automatic Bit-Rate Alignment
by H8/3434F
Host Bit Rate*1
9600 bps
8 MHz to 16 MHz
4 MHz to 16 MHz
2 MHz to 16 MHz
4800 bps
2400 bps
Notes: *1 Use a host bit rate setting of 2400, 4800, or 9600 bps only. No other setting should be
used.
*2Although the H8/3434F may also perform automatic bit-rate alignment with bit rate an
system clock combinations other than those shown in table 19.8, there will be a slight
difference between the bit rates of the host and the H8/3434F, and subsequent transfer
will not be performed normally. Therefore, only a combination of bit rate and system
clock frequency within one of the ranges shown in table 19.8 can be used for boot
mode execution.
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HITACHI [ HITACHI SEMICONDUCTOR ]
