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HD6473434F16 参数 Datasheet PDF下载

HD6473434F16图片预览
型号: HD6473434F16
PDF下载: 下载PDF文件 查看货源
内容描述: 12伏不能应用于S -掩模模型(单电源规格) ,因为这可能会永久损坏设备。 [12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.]
分类和应用: 外围集成电路微控制器可编程只读存储器时钟
文件页数/大小: 752 页 / 2557 K
品牌: HITACHI [ HITACHI SEMICONDUCTOR ]
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8.4.5  
Timing of Input Capture Flag (ICF) Setting  
The input capture flag ICFx (x = A, B, C, D) is set to 1 by the internal input capture signal. Figure  
8.12 shows the timing of this operation.  
ø
Internal input  
capture signal  
ICF  
FRC  
ICR  
N
N
Figure 8.12 Setting of Input Capture Flag  
8.4.6  
Setting of Output Compare Flags A and B (OCFA and OCFB)  
The output compare flags are set to 1 by an internal compare-match signal generated when the  
FRC value matches the OCRA or OCRB value. This compare-match signal is generated at the last  
state in which the two values match, just before FRC increments to a new value.  
Accordingly, when the FRC and OCR values match, the compare-match signal is not generated  
until the next period of the clock source. Figure 8.13 shows the timing of the setting of the output  
compare flags.  
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