10.2.3 PWM D/A Control Register (DACR)...................................................................
10.2.4 Module Stop Control Register (MSTPCR)...........................................................
10.3 Bus Master Interface ..........................................................................................................
10.4 Operation ...........................................................................................................................
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249
250
253
Section 11 16-Bit Free-Running Timer
......................................................................... 257
11.1 Overview............................................................................................................................
11.1.1 Features.................................................................................................................
11.1.2 Block Diagram......................................................................................................
11.1.3 Input and Output Pins...........................................................................................
11.1.4 Register Configuration .........................................................................................
11.2 Register Descriptions.........................................................................................................
11.2.1 Free-Running Counter (FRC)...............................................................................
11.2.2 Output Compare Registers A and B (OCRA, OCRB) .........................................
11.2.3 Input Capture Registers A to D (ICRA to ICRD).................................................
11.2.4 Output Compare Registers AR and AF (OCRAR, OCRAF) ...............................
11.2.5 Output Compare Register DM (OCRDM) ...........................................................
11.2.6 Timer Interrupt Enable Register (TIER)...............................................................
11.2.7 Timer Control/Status Register (TCSR) ................................................................
11.2.8 Timer Control Register (TCR) .............................................................................
11.2.9 Timer Output Compare Control Register (TOCR)...............................................
11.2.10 Module Stop Control Register (MSTPCR)...........................................................
11.3 Operation ...........................................................................................................................
11.3.1 FRC Increment Timing.........................................................................................
11.3.2 Output Compare Output Timing...........................................................................
11.3.3 FRC Clear Timing ................................................................................................
11.3.4 Input Capture Input Timing ..................................................................................
11.3.5 Timing of Input Capture Flag (ICF) Setting.........................................................
11.3.6 Setting of Output Compare Flags A and B (OCFA, OCFB) ................................
11.3.7 Setting of FRC Overflow Flag (OVF) ..................................................................
11.3.8 Automatic Addition of OCRA and OCRAR/OCRAF..........................................
11.3.9 ICRD and OCRDM Mask Signal Generation ......................................................
11.4 Interrupts ............................................................................................................................
11.5 Sample Application ...........................................................................................................
11.6 Usage Notes .......................................................................................................................
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258
259
260
261
261
261
262
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264
264
266
269
271
273
274
274
275
276
276
278
279
280
280
281
282
282
283
Section 12 8-Bit Timers
..................................................................................................... 289
12.1 Overview............................................................................................................................
12.1.1 Features.................................................................................................................
12.1.2 Block Diagram......................................................................................................
12.1.3 Pin Configuration .................................................................................................
12.1.4 Register Configuration .........................................................................................
12.2 Register Descriptions.........................................................................................................
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291
292
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vii
HITACHI [ HITACHI SEMICONDUCTOR ]
