HANBit
HSD16M64D16A
+3.3V
V =1.4V
tt
1200W
50pF*
50W
DOUT
DOUT
Z0=50W
870W
50pF
V
V
(DC) = 2.4V, I
= -2mA
OH
OH
OL
(DC) = 0.4V, I = 2mA
OL
(Fig. 2) AC output load circuit
(Fig. 1) DC output load
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
VERSION
PARAMETER
SYMBOL
UNIT
NOTE
-13
15
20
20
45
-12
-10
20
20
20
50
-10L
20
Row active to row active delay
RAS to CAS delay
tRRD(min)
tRP(min)
16
20
20
48
ns
ns
ns
ns
1
1
1
1
20
Row precharge time
tRP(min)
20
tRAS(min)
tRAS(max)
50
Row active time
100
2
ns
Row cycle time
tRC(min)
tRDL(min)
tDAL(min)
tCDL(min)
tBDL(min)
tCCD(min)
65
68
70
70
ns
CLK
-
1
2
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
2 CLK + 20 ns
1
1
1
2
CLK
CLK
CLK
2
2
3
Col. address to col. address delay
CAS latency=3
CAS latency=2
Number of valid output data
ea
4
-
1
Notes :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
.5. For -8/H/L/10, tRDL=1CLK and tDAL=1CLK+20ns is also supported .
( recommend : tRDL=2CLK and tDAL=2CLK + 20ns.)
URL: www.hbe.co.kr
REV 1.0 (August.2002)
7
HANBit Electronics Co.,Ltd