CCD image sensors
S11510 series
Operating conditions (MPP mode, Ta=25 °C)
Parameter
Output transistor drain voltage
Reset drain voltage
Over flow drain voltage
Over flow gate voltage
Output gate voltage
Symbol
VOD
VRD
VOFD
VOFG
Min.
23
11
11
0
Typ.
24
12
12
12
5
Max.
25
13
13
13
6
Unit
V
V
V
V
4
V
VOG
Substrate voltage
-
0
-
V
VSS
Input source
Vertical input gate
Horizontal input gate
-
-
-
-
8
V
V
V
VISV, VISH
VIG1V, VIG2V
VIG1H, VIG2H
VP1VH, VP2VH
VP1VL, VP2VL
VP1HH, VP2HH
VP3HH, VP4HH
VP1HL, VP2HL
VP3HL, VP4HL
VSGH
VRD
-8
-8
6
-8
Test point
-9
-9
4
High
Low
Vertical shift register clock voltage
Horizontal shift register clock voltage
V
V
-9
-7
High
Low
4
6
8
-6
-5
-4
High
Low
High
Low
High
Low
4
-6
4
-6
4
6
-5
6
-5
6
8
-4
8
-4
8
Summing gate voltage
Reset gate voltage
V
V
V
VSGL
VRGH
VRGL
VTGH
VTGL
RL
Transfer gate voltage
-9
90
-8
100
-7
110
External load resistance
kΩ
Electrical characteristics (Ta=25 °C)
Parameter
Signal output frequency
Symbol
fc
Min.
-
-
-
-
-
-
-
Typ.
Max.
0.5
-
-
-
-
-
-
Unit
MHz
0.25
600
1200
80
160
10
-1006
-1106
-1006
-1106
Vertical shift register
capacitance
pF
CP1V, CP2V
Horizontal shift register
capacitance
CP1H, CP2H
CP3H, CP4H
pF
Summing gate capacitance
Reset gate capacitance
pF
pF
CSG
CRG
10
-1006
-1106
-
-
30
60
0.99999
18
-
-
-
19
-
Transfer gate capacitance
pF
CTG
Charge transfer efficiency*3
DC output level
Output impedance
Power consumption*4
CTE
Vout
Zo
0.99995
-
V
kΩ
mW
17
-
-
10
4
P
-
*3: Charge transfer efficiency per pixel, measured at half of the full well capacity
*4: Power consumption of the on-chip amplifier plus load resistance
3
HAMAMATSU [ HAMAMATSU CORPORATION ]
