GS4576C09/18/36L
AC Differential Input Clock Levels
Parameter
Symbol
Min.
Max.
+ 0.6
Unit
V
Notes
1–5
V
V
Clock input differential voltage: CK and CK
0.4
ID(AC)
DDQ
V
V
/2 – 0.15
V
/2 + 0.15
DDQ
Clock input crossing point voltage: CK and CK
V
1–4, 6
IX(AC)
DDQ
Notes:
1. DKx and DKx have the same requirements as CK and CK.
2. All voltages referenced to V (GND).
SS
3. The CK and CK input reference level (for timing referenced to CK/CK) is the point at which CK and CK cross. The input reference level for
signals other than CK/CK is V
REF.
4. The CK and CK input slew rate must be 2 V/ns ( 4 V/ns if measured differentially).
5. is the magnitude of the difference between the input level on CK and the input level on CK.
V
ID
6. The value of V is expected to equal V /2 of the transmitting device and must track variations in the DC level of the same.
IX
DDQ
Differential Clock Input Requirements
VIN(DC) MAX
Maximum Clock Level
CK
VIX(AC)MAX
V
DDQ/2 + 0.15
3
VID(AC)
2
VID(DC)
VDDQ/2
1
VDDQ/2 – 0.15
VIX(AC)MIN
CK
VIN(DC) MIN
Minimum Clock Level
Notes:
1. CK and CK must cross within this region.
2. CK and CK must meet at least V
when static and centered around V /2.
DDQ
ID(DC)MIN
3. Minimum peak-to-peak swing.
4. It is a violation to tristate CK and CK after the part is initialized.
Rev: 1.04 11/2013
41/62
© 2011, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GSI [ GSI TECHNOLOGY ]
