GS4576C09/18/36L
DC Differential Input Clock Logic Levels
Parameter
Symbol
Min.
–0.3
0.2
Max.
Unit
V
Notes
1–4
V
V
V
+ 0.3
Clock input voltage level: CK and CK
IN(DC)
DDQ
V
+ 0.6
Clock input differential voltage: CK and CK
V
1–5
ID(DC)
DDQ
Notes:
1. DKx and DKx have the same requirements as CK and CK.
2. All voltages referenced to V (GND).
SS
3. The CK and CK input reference level (for timing referenced to CK/CK) is the point at which CK and CK cross. The input reference level for
signals other than CK/CK is V
REF.
4. The CK and CK input slew rate must be 2 V/ns ( 4 V/ns if measured differentially).
5. is the magnitude of the difference between the input level on CK and the input level on CK.
V
ID
Recommended AC Operating Conditions and Electrical Characteristics
Input AC Logic Levels
Parameter
Symbol
Min.
+ 0.2
Max.
Unit
V
Notes
1, 2, 3
1, 2, 3
V
V
Input High (logic 1) Voltage
Input Low (logic 0) Voltage
—
IH
REF
V
V
– 0.2
REF
—
V
IL
Notes:
1. All voltages referenced to V (GND).
SS
2. The AC and the DC input level specifications are defined in the HSTL standard (that is, the receiver will effectively switch as a result of the
signal crossing the AC input level, and will remain in that state as long as the signal does not ring back above (see drawing below) the DC
input Low (High) level).
3. The minimum slew rate for the input signals used to test the device is 2 V/ns in the range between V
and V
.
IL(AC)
IH(AC)
Nominal tAS/ tCS/ tDS and tAH/ tCH/ tDH Slew Rate
V
DDQ
V
IH(AC)MIN
V
IH(DC)MIN
V
REF
V
IL(DC)MAX
V
IL(AC)MAX
V
SS
Rev: 1.04 11/2013
40/62
© 2011, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.