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GS9090 参数 Datasheet PDF下载

GS9090图片预览
型号: GS9090
PDF下载: 下载PDF文件 查看货源
内容描述: GS9090 GenLINX -R III 270MB / s的解串器的SDI和DVB -ASI [GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI]
分类和应用:
文件页数/大小: 70 页 / 1181 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS9090 Data Sheet  
Table 1-1: Pin Descriptions (Continued)  
Pin  
Name  
Timing  
Type  
Description  
Number  
19  
SDOUT_TDO  
Synchronous  
with  
Output  
CONTROL SIGNAL INPUT  
Signal levels are LVCMOS / LVTTL compatible.  
SCLK_TCK  
Serial Data Output / Test Data Output  
Host Mode (JTAG/HOST = LOW):  
SDOUT_TDO operates as the host interface serial output, SDOUT,  
used to read status and configuration information from the internal  
registers of the device.  
JTAG Test Mode (JTAG/HOST = HIGH):  
SDOUT_TDO operates as the JTAG test data output, TDO.  
20  
SDIN_TDI  
Synchronous  
with  
Input  
CONTROL SIGNAL INPUT  
Signal levels are LVCMOS / LVTTL compatible.  
SCLK_TCK  
Serial Data Input / Test Data Input  
Host Mode (JTAG/HOST = LOW):  
SDIN_TDI operates as the host interface serial input, SDIN, used to  
write address and configuration information to the internal registers of  
the device.  
JTAG Test Mode (JTAG/HOST = HIGH):  
SDIN_TDI operates as the JTAG test data input, TDI.  
21, 29, 43  
IO_VDD  
Non  
Input  
Power supply for digital I/O.  
Synchronous  
Power  
For a 3.3V tolerant I/O, connect pins to either +1.8V DC or +3.3V DC.  
For a 5V tolerant I/O, connect pins to a +3.3V DC.  
NOTE: For power sequencing requirements, see Device Power Up on  
page 64.  
22  
DATA_ERROR  
Synchronous  
with PCLK  
Output  
STATUS SIGNAL OUTPUT.  
Signal levels are LVCMOS / LVTTL compatible.  
The DATA_ERROR signal will be LOW when an error within the  
received data stream has been detected by the device. This pin is an  
inverted logical ‘OR’ing of all detectable errors listed in the internal  
ERROR_STATUS register.  
Once an error is detected, DATA_ERROR will remain LOW until the  
start of the next video frame / field, or until the ERROR_STATUS  
register is read via the host interface.  
The DATA_ERROR signal will be HIGH when the received data stream  
has been detected without error.  
NOTE: It is possible to program which error conditions are monitored  
by the device by setting appropriate bits in the ERROR_MASK register  
HIGH. All error conditions are detected by default.  
28201 - 1 July 2005  
8 of 70  
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