GS9090 Data Sheet
Table 1-1: Pin Descriptions (Continued)
Pin
Name
Timing
Type
Description
Number
51
FW_EN
Non
Input
CONTOL SIGNAL INPUT
Synchronous
Signal levels are LVCMOS / LVTTL compatible.
Used to enable or disable the noise immune flywheel of the device.
When set HIGH, the internal flywheel is enabled. This flywheel is used
in the extraction of timing signals, the generation of TRS signals, the
automatic detection of video standards, and in manual switch line lock
handling.
When set LOW, the internal flywheel is disabled. Timing based TRS
errors will not be detected.
52
FIFO_EN
Non
Input
CONTOL SIGNAL INPUT
Synchronous
Signal levels are LVCMOS / LVTTL compatible.
Used to enable / disable the internal FIFO.
When FIFO_EN is HIGH, the internal FIFO will be enabled. Data will be
clocked out of the device on the rising edge of the RD_CLK input pin if
the FIFO is in video mode or DVB-ASI mode.
When FIFO_EN is LOW, the internal FIFO is bypassed and parallel
data is clocked out on the rising edge of the PCLK output.
53
54
VCO_VDD
LB_CONT
Analog
Analog
Input
Power
Power supply connection for Voltage-Controlled-Oscillator. Connect to
+1.8V DC.
Input
CONTROL SIGNAL INPUT
Control voltage to fine-tune the loop bandwidth of the PLL.
55
56
–
VCO_GND
LF+
Analog
Analog
–
Input
Power
Ground connection for Voltage-Controlled-Oscillator. Connect to GND.
Input
Loop filter component connection. Connect to pin 1 (LF-) as shown in
the Typical Application Circuit (Part B) on page 67.
Center Pad
Power
Connect to GND following the Recommended PCB Footprint on
page 69
28201 - 1 July 2005
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