GS9090 Data Sheet
Application HOST
GS9090
CS_TMS
SCLK_TCK
SDIN_TDI
SDOUT_TDO
JTAG_EN
In-circuit ATE probe
Figure 3-21: In-Circuit JTAG
Application HOST
GS9090
CS_TMS
SCLK_TCK
SDIN_TDI
SDOUT_TDO
JTAG_EN
Tri-State
In-circuit ATE probe
Figure 3-22: System JTAG
3.17 Device Power Up
The GS9090 has a recommended power supply sequence. To ensure correct
power up, power the CORE_VDD pins before the IO_VDD pins. In order to initialize
all internal operating conditions to their default state the application layer must hold
the RESET pin LOW for a minimum of t
= 1ms. (See Figure 3-23)
reset
Device pins can be driven prior to power up without causing damage.
+1.8V
+1.71V
CORE_VDD
RESET
treset
treset
Reset
Reset
Figure 3-23: Reset pulse
28201 - 1 July 2005
64 of 70
GENNUM [ GENNUM CORPORATION ]
