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GS9090 参数 Datasheet PDF下载

GS9090图片预览
型号: GS9090
PDF下载: 下载PDF文件 查看货源
内容描述: GS9090 GenLINX -R III 270MB / s的解串器的SDI和DVB -ASI [GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI]
分类和应用:
文件页数/大小: 70 页 / 1181 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS9090 Data Sheet  
Table 3-8: Host Interface Description for SMPTE 352M Payload Identifier Registers  
Register Name  
Bit  
Name  
Description  
R/W  
Default  
VIDEO_FORMAT_OUT_B  
Address: 10h  
15-8  
SMPTE 352M Byte 4  
Data will be available in this register when  
Video Payload Identification Packets are  
detected in the data stream.  
R
0
7-0  
SMPTE 352M Byte 3  
SMPTE 352M Byte 2  
SMPTE 352M Byte 1  
Data will be available in this register when  
Video Payload Identification Packets are  
detected in the data stream.  
R
R
R
0
0
0
VIDEO_FORMAT_OUT_A  
Address: 0Fh  
15-8  
7-0  
Data will be available in this register when  
Video Payload Identification Packets are  
detected in the data stream.  
Data will be available in this register when  
Video Payload Identification Packets are  
detected in the data stream.  
3.9.6 Automatic Video Standard and Data Format Detection  
The GS9090 can independently detect the input video standard and data format by  
using the timing parameters extracted from the received TRS ID words. Total  
samples per line, active samples per line, total lines per field/frame, and active lines  
per field/frame are all calculated and presented to the host interface via the  
RASTER_STRUCTURE registers (Table 3-9).  
Also associated with the RASTER_STRUCTURE registers is the status bit,  
STD_LOCK. The GS9090 will set STD_LOCK HIGH when the flywheel has  
achieved full synchronization to the received video standard. STD_LOCK is stored  
in the DATA_FORMAT register (Table 3-7).  
The four RASTER_STRUCTURE registers, as well as the STD_LOCK status bit  
will default to zero after a device reset. They will also default to zero if the device  
loses lock to the input data stream (LOCKED = LOW), or if the SMPTE_BYPASS  
pin is asserted LOW.  
Table 3-9: Host Interface Description for Raster Structure Registers  
Register Name  
Bit  
Name  
Description  
R/W  
Default  
RASTER_STRUCTURE1  
Address: 11h  
15-11  
10-0  
Not Used  
R
0
0
0
0
RASTER_STRUCTURE1[10:0]  
Total Lines Per Frame  
Not Used  
RASTER_STRUCTURE2  
Address: 12h  
15-13  
12-0  
RASTER_STRUCTURE2[12:0]  
Total Words Per Line  
Not Used  
R
RASTER_STRUCTURE3  
Address: 13h  
15-13  
12-0  
RASTER_STRUCTURE3[12:0]  
Words Per Active Line  
Not Used  
R
RASTER_STRUCTURE4  
Address: 14h  
15-11  
10-0  
RASTER_STRUCTURE4[10:0]  
Active Lines Per Field  
R
28201 - 1 July 2005  
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