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GS1561-CFE3 参数 Datasheet PDF下载

GS1561-CFE3图片预览
型号: GS1561-CFE3
PDF下载: 下载PDF文件 查看货源
内容描述: GS1560A / GS1561 HD - LINX -R II双率解串器 [GS1560A/GS1561 HD-LINX-R II Dual-Rate Deserializer]
分类和应用: 存储静态存储器
文件页数/大小: 80 页 / 1307 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS1560A/GS1561 Data Sheet  
Table 3-14: Host Interface Description for Internal Processing Disable Register  
Register Name  
Bit  
Name  
Description  
R/W  
Default  
IOPROC_DISABLE  
Address: 000h  
15-9  
8
Not Used.  
0
H_CONFIG  
Horizontal sync timing output configuration. Set LOW  
for active line blanking timing. Set HIGH for H blanking  
based on the H bit setting of the TRS words. See  
Figure 3-2.  
7-6  
5
Not Used.  
0
ILLEGAL_REMAP  
Illegal Code re-mapping. Correction of illegal code  
words within the active picture. Set HIGH to disable.  
The IOPROC_EN/DIS pin must be set HIGH.  
R/W  
4
EDH_CRC_INS  
Error Detection & Handling (EDH) Cyclical Redundancy  
Check (CRC) error correction insertion. In SD mode set  
HIGH to disable. The IOPROC_EN/DIS pin must be set  
HIGH.  
R/W  
0
3
2
ANC_CSUM_INS  
CRC_INS  
Ancillary Data Check-sum insertion. Set HIGH to  
disable. The IOPROC_EN/DIS pin must be set HIGH.  
R/W  
R/W  
0
0
Y and C line based CRC insertion. In HD mode, inserts  
line based CRC words in both the Y and C channels.  
Set HIGH to disable. The IOPROC_EN/DIS pin must be  
set HIGH.  
1
0
LNUM_INS  
TRS_INS  
Y and C line number insertion. In HD mode set HIGH to  
disable. The IOPROC_EN/DIS pin must be set HIGH.  
R/W  
R/W  
0
0
Timing Reference Signal Insertion. Set HIGH to disable.  
The IOPROC_EN/DIS pin must be set HIGH.  
3.10.6.1 Illegal Code Remapping  
If the ILLEGAL_REMAP bit of the IOPROC_DISABLE register is set LOW, the  
GS1560A will remap all codes within the active picture between the values of 3FCh  
and 3FFh to 3FBh. All codes within the active picture area between the values of  
000h and 003h will be re-mapped to 004h.  
In addition, 8-bit TRS and ancillary data preambles will be remapped to 10-bit  
values if this feature is enabled.  
3.10.6.2 EDH CRC Error Correction  
The GS1560A/GS1561 will generate and insert active picture and full field CRC  
words into the EDH data packets received by the device. This feature is only  
available in SD mode and is enabled by setting the EDH_CRC_INS bit of the  
IOPROC_DISABLE register LOW.  
EDH CRC calculation ranges are described in EDH CRC Error Detection on  
page 58.  
NOTE: Although the GS1560A/GS1561 will modify and insert EDH CRC words  
and EDH packet checksums, EDH error flags will not be updated by the device.  
27360 - 8 September 2005  
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