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GS1561-CFE3 参数 Datasheet PDF下载

GS1561-CFE3图片预览
型号: GS1561-CFE3
PDF下载: 下载PDF文件 查看货源
内容描述: GS1560A / GS1561 HD - LINX -R II双率解串器 [GS1560A/GS1561 HD-LINX-R II Dual-Rate Deserializer]
分类和应用: 存储静态存储器
文件页数/大小: 80 页 / 1307 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS1560A/GS1561 Data Sheet  
3.6.3 Slave Mode  
The GS1560A/GS1561 is said to be in slave mode when the MASTER/SLAVE  
input signal is set LOW. In this case, the four device pins listed in Master Mode on  
page 36 become input control signals.  
It is required that the application layer set the first three inputs to reflect the  
appropriate input data format (SMPTE_BYPASS, DVB_ASI, and SD/HD). If just  
one of these three is configured incorrectly, the device will not lock to the input data  
stream, and the DATA_ERROR pin will be set LOW.  
The fourth input signal, RC_BYP (GS1560A only), allows the application layer to  
determine whether the serial digital loop-through output will be a reclocked or  
buffered version of the input, Reclocker Bypass Control on page 34. Table 3-3  
shows the required settings for various input formats.  
Table 3-2: Master Mode Output Status Signals  
PIN SETTINGS  
FORMAT  
SMPTE_BYPASS  
DVB_ASI  
SD/HD  
RC_BYP  
(GS1560A  
only)  
HD SMPTE  
SD SMPTE  
DVB-ASI  
HIGH  
HIGH  
LOW  
LOW  
LOW  
LOW  
HIGH  
LOW  
LOW  
HIGH  
HIGH  
HIGH  
HIGH  
LOW  
HIGH  
NOT SMPTE  
OR DVB-ASI*  
HIGH OR LOW  
*NOTE: When the device locks to the data stream in PLL lock mode, the parallel outputs will be  
latched LOW, and the serial loop-through output (GS1560A only) will be a buffered version of the  
input.  
Table 3-3: Slave Mode Input Control Signals  
PIN SETTINGS  
FORMAT  
SMPTE_BYPASS  
DVB_ASI  
SD/HD  
HD SMPTE  
SD SMPTE  
DVB-ASI  
HIGH  
HIGH  
LOW  
LOW  
LOW  
LOW  
HIGH  
LOW  
LOW  
HIGH  
HIGH  
NOT SMPTE OR  
DVB-ASI*  
HIGH OR LOW  
*NOTE: See Data Through Mode on page 46 for a complete description of Data Through mode.  
27360 - 8 September 2005  
37 of 80  
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