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GS1561-CFE3 参数 Datasheet PDF下载

GS1561-CFE3图片预览
型号: GS1561-CFE3
PDF下载: 下载PDF文件 查看货源
内容描述: GS1560A / GS1561 HD - LINX -R II双率解串器 [GS1560A/GS1561 HD-LINX-R II Dual-Rate Deserializer]
分类和应用: 存储静态存储器
文件页数/大小: 80 页 / 1307 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS1560A/GS1561 Data Sheet  
3.4.2 Reclocker Bypass Control  
The serial digital loop-through output may be either a buffered version of the serial  
digital input signal, or a reclocked version of that signal.  
When operating in slave mode, the application layer may choose the reclocked  
output by setting RC_BYP to logic HIGH. If RC_BYP is set LOW, the data stream  
will bypass the internal reclocker and the serial digital output will be a buffered  
version of the input.  
When operating in master mode, the device will assert the RC_BYP pin HIGH only  
when it has successfully locked to a SMPTE or DVB-ASI input data stream, (see  
Lock Detect on page 35). In this case, the serial digital loop-through output will be  
a reclocked version of the input.  
3.4.3 Serial Digital Output Mute  
The GS1560A will automatically mute the serial digital loop-through output in both  
master and slave modes when the internal carrier_detect signal indicates an  
invalid serial input.  
The loop-through output will also be muted in slave mode when SDO/SDO is  
selected as reclocked, (RC_BYP = HIGH), but the lock detect block has failed to  
lock to the data stream, (LOCKED = LOW).  
Table 3-1 summarizes the possible states of the serial digital loop-through output  
data stream.  
Table 3-1: Serial Digital Loop-Through Output Status  
SLAVE MODE  
RC_BYP  
SDO  
CD  
LOCKED  
(INPUT)  
RECLOCKED  
BUFFERED  
MUTED  
LOW  
LOW  
LOW  
HIGH  
HIGH  
X
HIGH  
LOW  
HIGH  
X
LOW  
LOW*  
MUTED  
MASTER MODE  
RC_BYP  
(OUTPUT)  
CD  
SDO  
LOCKED  
RECLOCKED  
BUFFERED  
MUTED  
LOW  
LOW  
HIGH  
HIGH  
LOW  
HIGH  
LOW  
LOW  
LOW*  
*NOTE: LOCKED = HIGH if and only if CD = LOW  
27360 - 8 September 2005  
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