5.2 Typical Application Circuit (Part B)
+3. 3V
G ND_VC O
I O _ V D D
1u
10n
I O _ G N D
10n
G ND_D
G O 1 5 5 5
( G O 1 5 2 5 )
4
8
V C O _ V C C
1 u
G
N
D
G N D
+1. 8V
+3. 3V
G ND_VC O
C O R E _ V D D
C O R E _ G N D
V
C O _ V C C
G ND_VC O
G ND_VC O
I O _ V D D
10n
1 0 n
1u
10n
V
C O _ V C C
G ND_VC O
10n
I O _ G N D
4 K 7 5 + / - 1 %
4 K 7 5 + / - 1 %
G ND_D
G ND_D
+3. 3V
G ND_VC O
0
+1. 8V
+3. 3V
C P _ V D D
C P _ G N D
2n2
0
C O R E _ V D D
C O R E _ G N D
10n
1u
I O _ V D D
10n
10n
1u
10n
0
G ND_VC O
100n
I O _ G N D
G ND_D
G ND_D
G ND_A
3 9 K 2
G ND_VC O
+1. 8V
B U F F _ V D D
P D _ V D D
10n
P D B U F F _ G N D
G ND_A
D A T A [ 1 9 . . 0 ]
+ 1 . 8 V _ A
+ 3 . 3 V
A 1 0
A 9
B 1 0
B 9
C 1 0
C 9
D 1 0
D A T A 1 9
D O U T 1 9
D O U T 1 8
D A T A 1 8
D A T A 1 7
D A T A 1 6
D A T A 1 5
D A T A 1 4
D A T A 1 3
D A T A 1 2
D A T A 1 1
D A T A 1 0
F 1
C D 1
D 1
E 2
E 1
D O U T 1 7
D O U T 1 6
D O U T 1 5
D O U T 1 4
D O U T 1 3
D O U T 1 2
D O U T 1 1
D O U T 1 0
D O U T 9
D O U T 8
D O U T 7
D O U T 6
D O U T 5
D O U T 4
D O U T 3
D D I _ 1
T E R M 1
D D I _ 1
10n
0
EQ_G ND
C D
J 1
G 1
G ND_D
C D 2
D D I _ 2
4 u 7
D 9
D D I 2
D D I 2
E 1 0
E 9
H 1
H 2
D D I _ 2
T E R M 2
G S 1 5 5 9
4 u 7
F 1 0
F 9
D A T A 9
10n
EQ_G ND
D A T A 8
K 1
G 1 0
G 9
D A T A 7
D A T A 6
D A T A 5
D A T A 4
D A T A 3
D A T A 2
D A T A 1
D A T A 0
R S E T
R E S E T _ T R S T
20bit/10bit
I O P R O C _ E N / D I S
S D O _ E N / D I S
F W _ E N / D I S
I P S E L
J T A G / H O S T
M A S T E R / S L A V E
S M P T E _ B Y P A S S
S D / H D
G 6
H 1 0
H 9
J 1 0
J 9
K 1 0
K 9
281 +/-1%
R E S E T _ T R S T
20bit/10bit
I O P R O C _ E N / D I S
S D O _ E N / D I S
F W _ E N / D I S
I P S E L
J T A G / H O S T
M A S T E R / S L A V E
S M P T E _ B Y P A S S
F 4
G 4
J 5
B 7
D 4
+1. 8V_A
D O U T 2
D O U T 1
D O U T 0
R E S E T _ T R S T
10n
K
C
6
6
R E S E T _ T R S T
A 7
H 7
P C L K
20bit/10bit
P C L K
20bit/10bit
G 5
E 4
D 5
C 7
H 5
D A T A _ E R R O R
D A T A _ E R R O R
L O C K E D
I O P R O C _ E N / D I S
D
6
L O C K
S D / H D
I O P R O C _ E N / D I S
D V B _ A S I
Y
C
A
A
N C
N C
D V B _ A S I
C 8
D 8
G 8
H 8
J 7
Y
C
A
A
N
N
C
C
R
C _ B Y P
S D O _ E N / D I S
F W _ E N / D I S
I P S E L
R
C _ B Y P
S D O _ E N / D I S
F W _ E N / D I S
I P S E L
S C L K _ T C K
S D I N _ T D I
S D O U T _ T D O
C S _ T M S
F I F O _ L D
S C L K _ T C K
F I F O _ L D
J
H
6
6
H
V
F
S D I N _ T D I
S D O U T _ T D O
C S _ T M S
H
V
F
H 4
K 7
J T A G / H O S T
J T A G / H O S T
M A S T E R / S L A V E
M A S T E R / S L A V E
S M P T E _ B Y P A S S
S D / H D
2 k2
2 k2
2 k2
2 k2
S M P T E _ B Y P A S S
+1. 8V_A
+1. 8V_A
S D / H D
P C L K
75
P C L K
D V B _ A S I
D V B _ A S I
D A T A _ E R R O R
D A T A _ E R R O R
10n
R
C _ B Y P
10n
R
C _ B Y P
L O C K
L O C K
G ND_A
75
Y
A
A
N
N
C
C
75
Y
A
A
N
N
C
C
N O T E : S M P T E _ B Y P A S S , S D / H D , D V B _ A S I , a n d R C _ B Y P
a r e I N P U T S i n s l a v e m o d e ( M A S T E R / S L A V E L O W ) , a n d
a r e O U T P U T S i n m a s t e r m o d e ( M A S T E R / S L A V E H I G H ) .
=
G ND_A
C
=
C
T o t h e G S 1 5 2 8 A
C a b l e D r i v e r
F I F O _ L D
H
F I F O _ L D
H
S C L K _ T C K
S C L K _ T C K
N O T E : S e e G e n n u m ' s R e f e r e n c e D e s i g n :
" I n t e r f a c i n g t h e G S 1 5 3 2 t o t h e G S 1 5 2 8 M u l t i - r a t e C a b l e D r i v e r "
V
F
S D I N _ T D I
V
F
S D I N _ T D I
S D O U T _ T D O
S D O U T _ T D O
C S _ T M S
C S _ T M S
GS1559 HD-LINX™ II Multi-Rate Deserializer with
Loop-Through Cable Driver
Data Sheet
66 of 71
30572 - 8
July 2008
GENNUM [ GENNUM CORPORATION ]
