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GS1559_08 参数 Datasheet PDF下载

GS1559_08图片预览
型号: GS1559_08
PDF下载: 下载PDF文件 查看货源
内容描述: HD- LINX II多速率解串器,带环通电缆驱动器 [HD-LINX II Multi-Rate Deserializer with Loop-Through Cable Driver]
分类和应用: 驱动器
文件页数/大小: 71 页 / 1322 K
品牌: GENNUM [ GENNUM CORPORATION ]
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Table 4-5: Host Interface Description for Programmable Ancillary Data Type Registers (Continued)  
Register Name  
Bit  
Name  
Description  
R/W  
Default  
ANC_TYPE4  
Address: 008h  
15-8  
ANC_TYPE4[15:8]  
Used to program the DID for ancillary data  
detection at the YANC and CANC output  
R/W  
0
7-0  
ANC_TYPE4[7:0]  
Used to program the SDID for ancillary data  
detection at the YANC and CANC output.  
R/W  
0
Should be set to zero if no SDID is present in the  
ancillary data packet to be detected.  
ANC_TYPE5  
Address: 009h  
15-8  
7-0  
ANC_TYPE5[15:8]  
ANC_TYPE5[7:0]  
Used to program the DID for ancillary data  
detection at the YANC and CANC output  
R/W  
R/W  
0
0
Used to program the SDID for ancillary data  
detection at the YANC and CANC output.  
Should be set to zero if no SDID is present in the  
ancillary data packet to be detected.  
4.10.3 SMPTE 352M Payload Identifier  
The GS1559 can receive and detect the presence of the SMPTE 352M Payload Identifier  
Ancillary Data Packet. This four word Payload Identifier Packet may be used to indicate  
the transport mechanism, frame rate and line scanning/sampling structure.  
Upon reception of this packet, the device will extract the four words describing the  
video format being transported and make this information available to the Host  
Interface via the four VIDEO_FORMAT_OUT registers (Table 4-6).  
The VIDEO_FORMAT_OUT registers will only be updated if the received checksum is  
the same as the locally calculated checksum.  
These registers will be cleared to zero, indicating an undefined format, if the device loses  
lock to the input data stream (LOCKED = LOW), or if the SMPTE_BYPASS pin is asserted  
LOW. This is also the default setting after device reset.  
The SMPTE 352M packet should be received once per field for interlaced systems and  
once per frame for progressive systems. If the packet is not received for two complete  
video frames, the VIDEO_FORMAT_OUT registers will be cleared to zero.  
GS1559 HD-LINX™ II Multi-Rate Deserializer with  
Loop-Through Cable Driver  
Data Sheet  
43 of 71  
30572 - 8  
July 2008  
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