GL860A USB 2.0 UVC Camera Controller
Offset C2h – CLKRG_CLK ……………………………………..…………… Default value = 8’h00
CLKFG2
R/W
CLKFG1
R/W
CLKFG0
R/W
CLKRG2 CLKRG1 CLKRG0
R/W R/W R/W
--
--
--
--
5-3 CLKFG[2:0]
Falling edge of MCLK.
Rising edge of MCLK.
2-0 CLKRG[2:0]
Offset C3h – HV_CC ……………………………………………..…………… Default value = 8’h00
VCC2
R/W
VCC1
R/W
VCC0
R/W
HCC2
R/W
HCC1
R/W
HCC0
R/W
--
--
--
--
5-3 VCC[2:0]
2-0 HCC[2:0]
Phase of output VSYNC.
Phase of output HSYNC.
Offset C4h – RHNL …………….….…………………………………..……… Default value = 8’h00
RHN7
R/W
RHN6
R/W
RHN5
R/W
RHN4
R/W
RHN3
R/W
RHN2
R/W
RHN1
R/W
RHN0
R/W
Offset C5h – RHNH_FHNH ……….…………………………………..……… Default value = 8’h00
--
--
--
--
FHN10
R/W
FHN9
R/W
FHN8
R/W
RHN10
R/W
RHN9
R/W
RHN8
R/W
RHN[10:0]
Pixel number of the rising edge of HSYNC
Offset C6h – FHNL ……….……………………………..……………..……… Default value = 8’h00
FHN7
R/W
FHN6
R/W
FHN5
R/W
FHN4
R/W
FHN3
R/W
FHN2
R/W
FHN1
R/W
FHN0
R/W
FHN[10:0]
Pixel number of falling edge of HSYNC
Offset C7h – RVPNL …………….….…………………………………..……… Default value = 8’h00
RVPN7
R/W
RVPN6
R/W
RVPN5
R/W
RVPN4
R/W
RVPN3
R/W
RVPN2
R/W
RVPN1
R/W
RVPN0
R/W
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Page 30
GENESYS [ GENESYS LOGIC ]
