GL860A USB 2.0 UVC Camera Controller
CHAPTER 5 FUNCTIONAL DESCRIPTION
5.1 Function Block
CCD/CMOS
Sensor I/F
USB 2.0
PHY
TXFIFO
PIE
CPU
8052
Figure 5.1 - Block Diagram
CCD Module/CMOS Sensor Interface
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GL860A can link with popular CMOS sensor on market for PC camera application. GL860A can be
configured by different sensor requirement. If sensor is acting as master, GL860A can accept
HSYNC/VSYNC from sensor. If GL860A is configured as a master HSYNC/VSYNC will be provided
by GL860A to sensor. GL860A keep the most flexibility to fit most of the sensors. The detail of
configuration needs to refer to GL860A Application Note. For most sensors no matter of YUV format or
RGB format, they can be easily transferred image data to PC by GL860A.
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TXFIFO
GL860A build in 6K byte internal buffer for USB high bandwidth application. This 6K internal buffer
can be used as transmitted buffer of isochronous pipe or bulk pipe. In USB specification, the highest
bandwidth of isochronous pipe is 24M byte/second, that can be easily derived to maximum frame rate
depending on configuration. For example, frame rate can be easily achieved to 30 frames per second if
image size is 640 x 480 if raw data output and sensor clock is 15M.
PIE
PIE handles the USB protocol defined in chapter 8 of USB specification Revision 2.0. It co-works with
CPU to play the role of the chip’s kernel. The main functions of PIE include the state machine of USB
protocol flow, CRC check, PID error check, and timeout check. Unlike USB1.1, bit stuffing/de-stuffing
is implemented in UTMI, not in PIE.
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USB 2.0 PHY (UTMI )
UTMI handles the low level USB protocol and signaling. It’s designed based on the Intel’s UTMI
specification 1.01. The major functions of UTMI logic are to handle the data and clock recovery, NRZI
encoding/decoding, Bit stuffing /de-stuffing, supporting USB2.0 test modes, and serial/parallel conversion.
CPU
CPU is the micro-processor unit of GL860A. It is an 8-bit 8052 processor with 8K ROM and 256 bytes
RAM. It operates at 15Mhz clock to decode the USB command issued from host and then prepares the
data to respond to the host. In addition,
C can handle GPIO (general purpose I/O) settings and
reading content of EEPROM to support high flexibility for customers of different configurations of chip.
These configurations include self/bus power mode setting, individual/gang mode setting, downstream
port number setting, device removable/non-removable setting, and PID/VID setting.
©2007 GenesysLogic, Inc. - All rights reserved.
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